Critical Path (CP) and Throughput (TP)
Header: fiction/algorithms/properties/critical_path_length_and_throughput.hpp
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template<typename Lyt>
cp_and_tp fiction::critical_path_length_and_throughput(const Lyt &lyt) Computes the critical path length (CP) length and the throughput (TP) of a gate-level layout.
The critical path length is defined as the longest path from any PI to any PO in tiles.
The throughput is defined as \(\frac{1}{x}\) where \(x\) is the highest path length difference between any sets of paths that lead to the same gate. This function provides only the denominator \(x\), as the numerator is always \(1\). Furthermore, \(x\) is given in clock cycles rather than clock phases because it is assumed that a path length difference smaller than
lyt.num_clocks()does not lead to any delay. Contrary, for any throughput value \(\frac{1}{x}\) with \(x > 1\), the layout computes its represented Boolean function only every \(x\) full clock cycles after the first inputs have been propagated through the design. Thereby, all PIs need to be held constant for \(x\) clock phases to ensure proper computation.For more information on the concept of throughput and delay see “Synchronization of Clocked Field-Coupled Circuits” by F. Sill Torres, M. Walter, R. Wille, D. Große, and R. Drechsler in IEEE NANO 2018; or “Design Automation for Field-coupled Nanotechnologies” by M. Walter, R. Wille, F. Sill Torres, and R. Drechsler published by Springer Nature in 2022.
The complexity of this function is \(\mathcal{O}(|T|)\) where \(T\) is the set of all occupied tiles in
lyt.- Template Parameters:
Lyt – Gate-level layout type.
- Parameters:
lyt – The gate-level layout whose CP and TP are desired.
- Returns:
A struct containing the CP and TP.
- mnt.pyfiction.critical_path_length_and_throughput(*args, **kwargs)
Overloaded function.
critical_path_length_and_throughput(layout: mnt.pyfiction.cartesian_gate_layout) -> tuple[int, int]
Computes the critical path length (CP) length and the throughput (TP) of a gate-level layout.
The critical path length is defined as the longest path from any PI to any PO in tiles.
The throughput is defined as \(\frac{1}{x}\) where \(x\) is the highest path length difference between any sets of paths that lead to the same gate. This function provides only the denominator \(x\), as the numerator is always \(1\). Furthermore, \(x\) is given in clock cycles rather than clock phases because it is assumed that a path length difference smaller than lyt.num_clocks() does not lead to any delay. Contrary, for any throughput value \(\frac{1}{x}\) with \(x > 1\), the layout computes its represented Boolean function only every \(x\) full clock cycles after the first inputs have been propagated through the design. Thereby, all PIs need to be held constant for \(x\) clock phases to ensure proper computation.
For more information on the concept of throughput and delay see "Synchronization of Clocked Field-Coupled Circuits" by F. Sill Torres, M. Walter, R. Wille, D. Große, and R. Drechsler in IEEE NANO 2018; or "Design Automation for Field-coupled Nanotechnologies" by M. Walter, R. Wille, F. Sill Torres, and R. Drechsler published by Springer Nature in 2022.
The complexity of this function is \(\mathcal{O}(|T|)\) where \(T\) is the set of all occupied tiles in lyt.
- Template parameter
Lyt: Gate-level layout type.
- Parameter
lyt: The gate-level layout whose CP and TP are desired.
- Returns:
A struct containing the CP and TP.
critical_path_length_and_throughput(layout: mnt.pyfiction.shifted_cartesian_gate_layout) -> tuple[int, int]
Computes the critical path length (CP) length and the throughput (TP) of a gate-level layout.
The critical path length is defined as the longest path from any PI to any PO in tiles.
The throughput is defined as \(\frac{1}{x}\) where \(x\) is the highest path length difference between any sets of paths that lead to the same gate. This function provides only the denominator \(x\), as the numerator is always \(1\). Furthermore, \(x\) is given in clock cycles rather than clock phases because it is assumed that a path length difference smaller than lyt.num_clocks() does not lead to any delay. Contrary, for any throughput value \(\frac{1}{x}\) with \(x > 1\), the layout computes its represented Boolean function only every \(x\) full clock cycles after the first inputs have been propagated through the design. Thereby, all PIs need to be held constant for \(x\) clock phases to ensure proper computation.
For more information on the concept of throughput and delay see "Synchronization of Clocked Field-Coupled Circuits" by F. Sill Torres, M. Walter, R. Wille, D. Große, and R. Drechsler in IEEE NANO 2018; or "Design Automation for Field-coupled Nanotechnologies" by M. Walter, R. Wille, F. Sill Torres, and R. Drechsler published by Springer Nature in 2022.
The complexity of this function is \(\mathcal{O}(|T|)\) where \(T\) is the set of all occupied tiles in lyt.
- Template parameter
Lyt: Gate-level layout type.
- Parameter
lyt: The gate-level layout whose CP and TP are desired.
- Returns:
A struct containing the CP and TP.
critical_path_length_and_throughput(layout: mnt.pyfiction.hexagonal_gate_layout) -> tuple[int, int]
Computes the critical path length (CP) length and the throughput (TP) of a gate-level layout.
The critical path length is defined as the longest path from any PI to any PO in tiles.
The throughput is defined as \(\frac{1}{x}\) where \(x\) is the highest path length difference between any sets of paths that lead to the same gate. This function provides only the denominator \(x\), as the numerator is always \(1\). Furthermore, \(x\) is given in clock cycles rather than clock phases because it is assumed that a path length difference smaller than lyt.num_clocks() does not lead to any delay. Contrary, for any throughput value \(\frac{1}{x}\) with \(x > 1\), the layout computes its represented Boolean function only every \(x\) full clock cycles after the first inputs have been propagated through the design. Thereby, all PIs need to be held constant for \(x\) clock phases to ensure proper computation.
For more information on the concept of throughput and delay see "Synchronization of Clocked Field-Coupled Circuits" by F. Sill Torres, M. Walter, R. Wille, D. Große, and R. Drechsler in IEEE NANO 2018; or "Design Automation for Field-coupled Nanotechnologies" by M. Walter, R. Wille, F. Sill Torres, and R. Drechsler published by Springer Nature in 2022.
The complexity of this function is \(\mathcal{O}(|T|)\) where \(T\) is the set of all occupied tiles in lyt.
- Template parameter
Lyt: Gate-level layout type.
- Parameter
lyt: The gate-level layout whose CP and TP are desired.
- Returns:
A struct containing the CP and TP.
Number of Gate Types
Header: fiction/algorithms/properties/count_gate_types.hpp
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template<typename Ntk>
void fiction::count_gate_types(const Ntk &ntk, count_gate_types_stats *pst = nullptr) Gives a detailed listing of all gate types present in the provided network (or layout). This function can distinguish most gate types available as atomic building blocks and can easily be extended to support more gate types. The given network (or layout) has to implement a function to test whether a node is of the respective gate type.
- Template Parameters:
Ntk – Logic network (or layout) type.
- Parameters:
ntk – The network (or layout).
pst – Statistics.