Changelog

All notable changes to this project will be documented in this file.

The format is based on Keep a Changelog.

Unreleased

Added

• Algorithms:

  • fcn::area computes the bounding-box area of a sidb::layout, including defects

  • physical_design::cell_grid_extent returns the extent of the cell grid that a gate library spans on a gate-level layout

  • SiDB design and simulation applications support shared millisecond timeouts, including defect-aware circuit retries.

  • utils::progress_callback and utils::progress_reporter let long-running algorithms report progress through the on_progress parameter. Finite physical-validity sweeps report their total.

  • Parallel algorithms accept on_worker_progress for stable worker activity and completed counts. Gate mapping, network passes, design-rule checks, and layout writers report counted phases.

• CLI:

  • pip install mnt.pyfiction installs the Python fiction shell, with interactive help, completion, script files, piped input, and JSON statistics. The shell also runs as python -m mnt.fiction.cli.

  • Each file format has a dedicated write_<format> command; readers support AAG, PLA, and all FGL topologies.

  • aig, abc, and generate provide AIG optimization, external ABC scripts, and network generators.

  • show supports optional Graphviz SVG rendering, explicit viewers, and temporary-file cleanup.

  • Long-running CLI commands show responsive progress. Counted phases use real bars; searches show candidate extents on one aggregate row. Quiet mode and redirected output suppress displays.

• Code quality:

  • Added QCA SVG regression tests for colors, detail modes, tile labels, and file output.

• Continuous integration:

  • Added Python source coverage, including package-root modules, and separate C++ checks.

• Data structures:

  • sidb::lattice describes H-Si geometry, sidb::lattice_site identifies a site, and sidb::layout stores tagged dots and defects without templates

  • sidb::charge_distribution assigns one charge state per SiDB and carries its energy; sidb::simulation::result stores one layout plus its physically valid configurations

  • sidb::simulation::potential_landscape stores static electrostatics for reuse across charge configurations and simulation worker threads

  • clocking::get_scheme(name, arrangement) looks up a clocking scheme without a layout type and accepts a 3 or 4 suffix on every scheme that supports that phase count.

• Dependencies:

  • mnt.pyfiction depends on prompt_toolkit, rich, and aigverse for the shell.

• Documentation:

  • Added an FCN bibliography, BibTeX download, and OpenGraph metadata.

  • Added nox -s docs for local previews, link checks, and Read the Docs builds.

  • Added synchronized C++/Python tabs and code copy buttons.

  • Added llms.txt, llms-full.txt, and Markdown exports of documentation pages.

• I/O:

  • read_sqd_layout, write_sqd_layout, write_sidb_layout_svg, read_surface_defects, and print_sidb_layout accept and produce sidb::layout; the SQD reader takes the lattice from the file instead of a template parameter

• Python bindings:

  • The callback members of parameter classes accept None, which clears the callback.

  • Shared SiDB deadlines raise TimeoutError; gate design releases the GIL.

  • Added directory-based test markers, including pytest -m simulation.

  • Marked the SiDB circuit-design integration test as slow; pytest -m 'not slow' skips it.

  • Exposed write_location_and_ground_state, whose binding existed but was never registered

  • lattice, lattice_site, sidb_layout (the lattice-based layout), read_sqd_layout, read_surface_defects, and the sidb_layout overloads of write_sqd_layout and write_sidb_layout_svg

  • Exposed charge_distribution, potential_landscape, charge transition thresholds, and sidb_simulation_result; simulation engines and consumers accept the new types

  • Exposed lattice-based BDL types, wire detection, and input-pattern generation

  • Exposed lattice-based logic checks, parameter domains, critical-temperature analysis, time-to-solution estimates, and population-stability analysis

  • SiDB gate and random-layout generators accept and return sidb_layout

  • SiDB defect analyses accept sidb_layout; the displacement analysis returns displacement_robustness_domain, and defect-domain writers return None

  • displacement_robustness_domain replaces its _100 and _111 variants

  • apply_bestagon_library returns sidb_layout

  • Added on_the_fly_sidb_circuit_design to design SiDB circuits from placed and routed hexagonal gate-level layouts, with configurable gate-design parameters

  • aig_network, xag_network, and mig_network with their readers, write_verilog, write_blif, write_aiger, convert_network, count_gate_types, and print_sidb_layout

  • dynamic_truth_table gains create_from_binary_string, create_from_hex_string, create_from_expression, create_random, to_binary, and to_hex; networks gain depth, gate-level layouts clone, clocked layouts get_clocking_scheme_name, and exact_params upper_bound_area

  • technology_mapping, simulate, count_gate_types, and write_dot_network accept every network type; technology_mapping_params exposes lt2, gt2, le2, and ge2

  • area accepts a mol_qca_layout, orthogonal_params exposes number_of_clock_phases with the num_clks enum, write_qcc_layout_params exposes use_filename_as_component_name, and gate_level_drvs fills a gate_level_drv_stats whose report is the full check as JSON

  • convert_network takes a target of the new network_target enum, so it produces AIGs, XAGs, and MIGs as well as technology networks

  • print_sidb_layout exposes lat_color and crop_layout, and write_dot_network and write_dot_layout expose indexes and clock_colors

  • The parameters of the algorithms that report progress accept a Python callable as on_progress, and exhaustive_ground_state_simulation takes it as an argument. These algorithms release the GIL while they run.

  • mnt.pyfiction ships .pyi stubs and a py.typed marker, so type checkers and IDEs see the signatures of the bindings. The package declares the Typing :: Typed classifier.

  • Coordinate stubs accept two- and three-element tuples. Domain iterators and simulation parameter dictionaries preserve their element types.

  • bdl_wire.port_direction exposes wire directions and I/O flags.

• Tooling:

  • Added EditorConfig settings that match the repository’s formatters.

  • Prek formats pyproject.toml with pyproject-fmt.

  • Added nox -s cpp_lint for local Clang-Tidy checks. Nox uses cmake as the sole CMake executable.

  • Added nox -s stubs, which regenerates the mnt.pyfiction stubs; CI fails when they are out of date.

Changed

• Algorithms:

  • Geometric distances accept coordinate pairs directly and use fixed uint64_t or double results. Squared Euclidean distance is noexcept and requires a result within the uint64_t range. Euclidean distance is a runtime noexcept function.

  • Routing paths, objectives, costs, gate-design exceptions, and coordinate-only placement state omit layout template parameters. Distance callbacks accept coordinate pairs; A* distance callbacks borrow their layout at construction.

  • Layout extraction and critical-path analysis reduce per-object allocations with flat traversal maps.

  • Gate-layout iteration skips removed objects through a compact live-object bitmap.

  • GOLD reuses built-in objective costs while ranking candidates and accepting solutions.

  • Breaking: A*, path enumeration, and Yen’s algorithm route around the gates and wires of every gate-level layout and take temporary constraints as a separate obstructions argument, leaving the caller’s data unchanged. &a_star_distance<Lyt> no longer converts to a distance_functor; use a_star_distance_functor.

  • QCA ONE via optimization now visits occupied crossing cells instead of scanning the full frame.

  • Avoid redundant progress-callback copies in algorithms and layout writers.

  • Critical-path analysis collapses wire chains to reduce traversal overhead on large layouts.

  • Avoid helper threads for single-worker sampling and contour exploration.

  • Reduce coordinate-vector allocations during operational-domain traversal.

  • Reuse completed three-dimensional contour surfaces across initial samples.

  • Contour tracing explores boundary surfaces in three or more dimensions in parallel. It uses operational_domain_params::number_of_threads; large contour interiors also use parallel inference.

  • convert_network maps a technology network’s inverters to create_not on a target without create_node, so AIG, XAG, and MIG conversions keep the inverters they used to lose

  • Breaking: QuickExact, QuickSim, ExGS, ClusterComplete, and Ground State Space simulate sidb::layout and return the non-template sidb::simulation::result

  • QuickSim returns std::nullopt for layouts with charged surface defects

  • On the same machine, ClusterComplete runs 2–4× faster (29-SiDB crossing: 11.4 → 5.1 ms; 56-SiDB NAND: 19.7 → 3.3 s). QuickSim improves by one third, ExGS by one quarter with 10,000× less heap traffic, and QuickExact holds speed with 28× less heap traffic

  • Potential landscape construction computes each symmetric SiDB interaction once

  • Breaking: SiDB generators, logic, and analysis algorithms use sidb::layout, kitty::dynamic_truth_table, and non-template simulation types

  • Breaking: SiDB defect analyses, generators, and gate libraries use sidb::layout

  • Their parameters use lattice_site for canvases, scan areas, and fixed SiDBs

  • Defect-influence and displacement-robustness domains are non-template types

  • Random gate design samples at most maximal_random_design_attempts candidates without enumerating canvas layouts; candidate counts saturate at the largest representable value

  • Gate-design and defect-influence APIs reject empty specifications

  • on_the_fly_gate_library measures the distance between a defect and the gate’s SiDBs on the surface’s lattice

  • surface_analysis and surface_black_list live in physical_design/surface_analysis.hpp and namespace fiction::physical_design. surface_analysis takes the surface as a sidb::layout, and exact has no SiDB header dependency

  • graph_oriented_layout_design, post_layout_optimization, and wiring_reduction are no longer noexcept, so an exception of a progress callback propagates to the caller

  • Breaking: fcn::area_params takes the layout type whose cell dimensions it defaults to, e.g., area_params<qca::layout>

  • Breaking: exact and orthogonal take layout_arrangement in their parameters for shifted Cartesian and hexagonal layouts and throw std::invalid_argument without it. graph_oriented_layout_design requires a Cartesian layout.

• Build system:

  • Direct CMake builds of the Python bindings now require nanobind 3.1 or newer.

  • The Docker image uses uv to install the mnt.pyfiction wheel and starts the Python fiction shell.

  • Git ignores the .pyd extension modules that Windows builds of the Python bindings produce.

  • The installed package now ships mockturtle with its SAT libraries and declares the parallel_hashmap include directory. It no longer defines fiction::mockturtle; link fiction::libfiction instead.

• CLI:

  • Commands now live in separate modules grouped by help category, with local options and metadata.

  • Breaking: SiDB commands use sidb::layout and simulation results. SQD files supply the lattice; --lattice_orientation is removed. Descriptions count SiDBs as dots.

  • SiDB simulation commands accept simulated entries and append results; earlier entries remain selectable. print, show, and statistics use stored ground states; SQD output exports geometry and defects.

  • Breaking: store positions count from 1. ps --all describes every entry; store --pop removes the active entry from explicitly selected stores.

  • Breaking: format-specific readers complement read. Directory imports, --sort, source, and the exit alias are removed; -f runs scripts and quit ends them.

  • Help includes command inputs, defaults, restrictions, and examples. Store tables and status text fit terminal widths; ps groups related statistics.

  • Errors use standard error. --quiet retains requested results, and -i continues scripted runs interactively. gold --progress remains accepted for compatibility; Rich controls search progress.

  • Long options use hyphens. See the CLI migration table for renamed options, topology choices, clock phases, gate selectors, and gate-library aliases. clustercomplete --base defaults to 3.

• Continuous integration:

  • Read the Docs now builds on Ubuntu 26.04.

  • Replaced Ubuntu 22.04 and GCC 11 CI coverage with Ubuntu 26.04, GCC 15, and Clang 22. Ubuntu 24.04 retains older compiler coverage.

  • Windows wheel builds no longer install the zero-hit job-local sccache; split mode compiles the extension only once per job.

  • Reusable workflows now use GitHub’s self-repository reference syntax.

  • Clang-Tidy skips Python-only changes in the bindings tree.

  • PyPI releases now use trusted publishing instead of an API token.

  • Renovate now waits three days for dated dependency releases before updating.

  • Astral’s ty now checks Python types in place of mypy.

• Data structures:

  • bounding_box_2d is renamed to bounding_box in C++ and Python.

  • Coordinate aliases and geometry traits are removed; use layout_base types and concrete layout arguments.

  • Gate-level layouts now keep large-arity input storage outside the common object record.

  • Breaking: Clocking scheme name() returns a borrowed std::string_view. Copy with std::string{scheme.name()} when the name must outlive its scheme.

  • Gate-level layouts now use create_gate, object_function, move_object, and foreach_object. Layout assignment printers use object terminology; update callers to these names.

  • Breaking: Gate-level layouts now store placed objects with generation-checked IDs and typed ports. Replace tile-valued signals with object lookup and explicit input connections; copies are independent.

  • Breaking: Layouts expose their frame through get_extent() in C++ and Python; Python constructors, resize, and area use the extent keyword. Extent values use ex rather than ar.

  • Breaking: Layout frames now use width, height, and layer counts. Replace maximum coordinates with extent counts; missing neighbors and empty bounds return optional values.

  • Breaking: Gate-level layouts own clocking, synchronization, and obstructions. Instantiate them directly on coordinate layouts; remove clocked_layout, synchronization_element_layout, obstruction_layout, and tile_based_layout wrappers.

  • Breaking: QCA, molQCA, and iNML have dedicated layout types, qca::layout, mol_qca::layout, and inml::layout, which replace cell_level_layout. Each carries only what its technology needs, and copies are independent. molQCA and iNML layouts are planar, only QCA cells have modes and synchronization elements, and molQCA cells name their own clock phase, so molQCA layouts have no clock zones.

  • Breaking: QCA and iNML layouts address clock zones by tile: all cells of a tile, on every layer, share its clock number. get_clock_zone returns the clock zone of a cell.

  • Hexagonal clocking factories now reuse immutable cutouts, and tile-clock comparisons avoid copying schemes.

  • clocking::state::get_clocking_scheme and gate-level layout getters now return a const reference.

  • Gate-level assign_clock_number now clocks every layer of a tile and ignores the z coordinate; get_clock_number returns the same clock number on all layers.

  • Breaking: clocking::scheme is now a non-template value type over signed (x, y) tile positions that can be copied, assigned, and compared. Factories drop their layout argument, e.g., clocking::twoddwave(), and twoddwave_hex takes a layouts::arrangement.

  • Breaking: clocking::scheme exposes name(), num_clocks(), max_in_degree(), and max_out_degree() as accessors and no longer compares equal to a name string; clocking::is_linear drops its layout argument.

  • Breaking: molQCA lives in technology/mol_qca/ and namespace fiction::mol_qca, together with sim7_mol_library and write_mol_qca_layout_svg. iNML names its element type inml::magnet_type.

  • Population-stability results expose the critical dot as critical_dot in C++ and Python.

  • SiDB layouts use dot operations and dot_tag for dot roles. assign_sidb defaults to the NORMAL tag. Lattice-site constructors take int32_t coordinates and an int8_t basis index.

  • Simulation results store charge states and energy beside one shared layout and potential landscape instead of copying a charge_distribution_surface for every configuration

  • Breaking: hexagonal_layout and shifted_cartesian_layout take their layouts::arrangement as a constructor argument instead of a template parameter, and get_arrangement() returns it.

  • Breaking: Coordinates are signed. layouts::layout_base::coordinate with three int32_t axes replaces coords::offset and coords::cube, and cartesian_layout, hexagonal_layout, and shifted_cartesian_layout derive from layout_base and are no longer templates. coordinates.hpp and layouts::coords are gone. Every int32_t coordinate is valid, including INT32_MIN; absence uses optional values. Layout extents accept axis counts from 0 through 2^31, and gate-level layouts support multiple layers.

  • Breaking: graph_oriented_layout_design_params::tiles_to_skip_between_pis is an int32_t, and graph_oriented_layout_design throws std::invalid_argument for values outside of [0, 2^20].

• Dependencies:

  • Native CI and Docker now use Z3 5.1.0. Wheel builds retain Z3 4.14.1 for their deployment floors.

  • fmt is fetched as the 12.1.0 release, the version alice carried; mockturtle’s bundled 11.0.2 does not compile with clang 20.

• Documentation:

  • Python layout docstrings use extent for the extent argument.

  • Corrected the coordinate page’s last_coordinate() accessor reference.

  • Clarified the difference between coverage collection jobs and Codecov coverage targets.

  • Standardized paper links in the docs and README to DOI URLs and corrected the ortho, equiv, and Yen references.

  • Corrected README links to the C++ library, CLI installation, and synchronization elements, and updated its QCA layout include.

  • Migrated the documentation to MyST Markdown and the Furo theme with light and dark modes.

  • Documentation now displays the installed package version.

  • QCA, molQCA, and iNML each document their layout on a page of its own, like SiDB, and the Python tabs list every bound symbol of their sections.

• Experiments:

  • Physical-design experiments use shared routing values and the bounding_box API.

  • Experiments now report exceptions with a failure exit status. Layout-area products use 64-bit arithmetic.

  • SiDB generator and circuit experiments use concrete parameter types with unchanged numerical values.

  • Gate-layout experiments use extent counts and extract logic networks for mockturtle algorithms. The reported dimensions and areas retain their definitions.

  • The Bestagon and hexagonalization experiments compute their unchanged area from the cell-grid extent.

  • Gate-layout experiments use direct capability headers and simpler status reporting.

  • The Bestagon, defect-aware, and on-the-fly experiments pass the even-row arrangement at runtime with unchanged results.

• Gate libraries:

  • Breaking: apply_gate_library<GateLibrary> and apply_parameterized_gate_library<GateLibrary> return the layout type of the library and take no cell-layout template argument. SiDB libraries produce an sidb::layout directly. fcn::gate_library takes the produced layout type instead of a technology tag.

  • apply_gate_library_to_defective_surface and apply_parameterized_gate_library_to_defective_surface take the defective surface as a sidb::layout and return one that carries its defects. SiDB gate placement, surface analysis, and circuit design no longer take a cell-layout template argument.

  • The Bestagon library throws std::invalid_argument for layouts that shift columns instead of failing to compile.

  • The ToPoliNano library and CLI reject row-shifted Cartesian layouts.

• I/O:

  • write_sidb_layout_svg and print_sidb_layout color an sidb::layout from an optional charge_distribution

  • Breaking: FGL writers now emit version 2 with size counts, declared interface order, and numbered input connections. Readers also accept legacy maximum-coordinate sizes; writers reject incomplete or physically invalid layouts before writing.

• Breaking: Restructured include/fiction/ so that the directory a header lives in tells you what the header is about, and introduced nested namespaces mirroring that tree (#1096, #1097):

  • algorithms/ is dissolved. The design-flow stages sit directly under fiction/ as synthesis/, physical_design/, and verification/

  • The flat io/ directory is dissolved. Readers and writers live with the module whose data they serialize: layouts/io/, networks/io/, synthesis/io/, technology/<tech>/io/, and technology/sidb/simulation/io/ for the writers of simulation results. The SVG writer is split by the technology it draws into qca/io/write_qca_layout_svg.hpp, mol_qca/io/write_mol_qca_layout_svg.hpp, and sidb/io/write_sidb_layout_svg.hpp; the QLL writer, which serves iNML, QCA, and molQCA alike, sits in fcn/io/

  • technology/ is split by technology into fcn/, qca/, mol_qca/, inml/, and sidb/. The SiDB subtree gains surfaces/, model/, simulation/ (with engines/, analysis/, defects/, logic/, and io/), generators/, and io/. The cell_technologies.hpp umbrella is gone; each technology’s layout is in its own layout.hpp

  • utils/ exists once, at the top, and holds what is domain-agnostic: math/, stl/, graph/ (graph_coloring, mincross), optimization/ (simulated_annealing), and io/ (csv_writer). A module’s own helpers sit directly in the module, so layout_utils.hpp is in layouts/ and routing_utils.hpp in physical_design/. The utils/debug/ printers join layouts/io/print_layout.hpp and networks/io/dot_drawers.hpp

  • Namespaces mirror the directories, so fiction::quickexact becomes fiction::sidb::simulation::engines::quickexact. technology/ itself adds no namespace level; clocking_scheme.hpp adds layouts::clocking for the family it defines

  • Identifiers shed prefixes the namespace now carries, so sidb_simulation_parameters becomes fiction::sidb::model::simulation_parameters, design_sidb_gates becomes fiction::sidb::generators::design_gates, and gate_library::fcn_gate becomes gate. Published names are kept, so qca_one_library stays fiction::qca::qca_one_library

  • The offset coordinate type fiction::offset::ucoord_t becomes fiction::layouts::layout_base::coordinate

  • The cluster hierarchy that clustercomplete and ground_state_space build is implementation detail, fiction::sidb::simulation::engines::detail, and leaves the documented API; ground_state_space_results::top_cluster stays as the handle into it

  fiction is header-only, so an include path is public API. This is a clean break: no forwarding headers are left behind and no deprecated using declarations

• Breaking: quickexact_params, quicksim_params, clustercomplete_params, is_operational_params, critical_temperature_params, physical_population_stability_params, generate_random_sidb_layout_params, ground_state_space_params, sidb_simulation_result, and charge_distribution_surface renamed their simulation_parameters member to sim_params, which is what several of them already called it. is_sidb_gate_design_impossible_params spelled it simulation_params and is unified to sim_params too. The Python attribute keeps the name simulation_parameters

• Breaking: Three member functions lose the prefix their class’s namespace now carries: charge_distribution_surface::set_sidb_simulation_engine becomes set_simulation_engine, and defect_surface::assign_sidb_defect and get_sidb_defect become assign_defect and get_defect

• Breaking: The clocking schemes share one fiction::layouts::clocking namespace and drop the clocking their identifiers repeated, so fiction::bancs_clocking becomes fiction::layouts::clocking::bancs, and likewise for open, columnar, row, twoddwave, twoddwave_hex, use, res, esr, cfe, ripple, and srs. The type they return, the enum they take, and the helpers around them move with them: clocking_scheme becomes clocking::scheme, clock_name::TWODDWAVE becomes clocking::TWODDWAVE_NAME, get_clocking_scheme becomes clocking::get_scheme, and is_linear_scheme becomes clocking::is_linear. clocking_scheme.hpp keeps its path, the scheme name strings are unchanged, and the clocked_layout members that mention clocking keep their names. fiction::ptr, which wrapped a scheme in a std::shared_ptr and had no caller, is removed

• Breaking: The truth table helpers move from utils to synthesis, where the gate libraries and technology mapping that specify functions with them live: fiction::create_and_tt becomes fiction::synthesis::create_and_tt, and fiction::tt_reader becomes fiction::synthesis::io::tt_reader. The header sheds its _utils suffix to match its siblings, so fiction/utils/truth_table_utils.hpp is now fiction/synthesis/truth_tables.hpp. Neither header depends on a network; both include only kitty and the standard library

• Breaking: The coordinate helpers adopt one naming rule: a bare noun is a type, everything else is an operation on one. coord_iterator becomes layout_base::coordinate_iterator, and area becomes area_of

• Breaking: fiction::constants is gone. ERROR_MARGIN, the floating-point comparison tolerance, is fiction::utils::math::ERROR_MARGIN; ELEMENTARY_CHARGE, K_E, BOLTZMANN_CONSTANT and EV_TO_JOULE are fiction::sidb::model constants in technology/sidb/model/physical_constants.hpp. PI, which duplicated std::numbers::pi at lower precision, and physical::EPSILON, which the electrostatics never used because the Coulomb constant K_E folds in the 1 / (4 * pi * epsilon_0) the two spelled out, are removed

• Breaking: Test files are renamed to test_<header>.cpp and the test/ tree mirrors include/fiction/. CTest case names gain the test_ prefix accordingly

  • read_fgl_layout creates shifted Cartesian and hexagonal layouts with the arrangement stored in the file; reading into a layout with another arrangement throws fgl_parsing_error.

  • Breaking: additional_graph_attributes and additional_node_attributes of the gate-level layout DOT drawers take the layout as an argument. The shifted Cartesian and hexagonal drawers share one base class.

• The pyfiction binding sources under bindings/ mirror the C++ namespaces: each binding sits in the directory of its namespace under the name of the header it wraps, and every directory that holds binding sources has exactly one registry. The Python package lives under python/, and its tests under test/python/

• Code quality:

  • C++ Python binding helpers now use a register_ prefix.

  • Python bindings use the nb namespace alias for nanobind.

  • The C++ test suite and the experiments now open the namespaces they use, one using namespace directive per namespace, rather than qualifying every symbol below fiction. That removes about 14,000 qualifier tokens. fiction::layouts::clocking is deliberately left closed, so those references read clocking::scheme, and detail namespaces stay qualified by their module

  • The license-tools hook now covers .hpp and .cpp as well as Python, and skips the generated pybind11_mkdoc_docstrings.hpp

  • Every C++ file now opens with the MIT copyright block and a Doxygen block carrying @file, a one-line @brief, and one @author line per contributor. The // Created by ... comments 428 files carried are gone; editing a file now means adding yourself to its list

  • Breaking for forks: the #ifndef FICTION_..._HPP include guards are replaced by #pragma once, so a patch that touches the top or the bottom of a header will not apply as-is. portability-avoid-pragma-once is switched off in .clang-tidy accordingly

  • The Debug build no longer emits compiler warnings. Cleared -Wshadow in energy_state and the two SiDB writer implementations, -Wswitch in write_sqd_layout, and -Wparentheses and -Wconversion in two tests

• Documentation:

  • The docs/ tree mirrors include/fiction/: every page sits in the directory of the headers it documents, and every directory with more than one page has a page named after it that carries the toctree

• Python bindings:

  • Breaking: Use read_network, read_fgl_layout, random_network, exact, and orthogonal with keyword network_type or layout_type. Specialized function names were removed.

  • Breaking: Layout value classes now use extent, layout_object_id, and layout_input_port names.

  • Breaking: Python keyword calls to random_coordinate now use corner1 and corner2 for the region bounds.

  • Breaking: mnt.pyfiction has one submodule per C++ namespace, such as mnt.pyfiction.layouts and mnt.pyfiction.sidb.simulation.engines; import each name from its submodule. The package root loads the submodules on first access and re-exports no bound names.

  • Breaking: Use clocking and obstruction methods directly on gate-level layouts. obstructions holds additional path-search constraints. qca_layout and inml_layout expose get_clock_zone and tile-size accessors, and their get_clock_number looks up the tile that contains the cell.

  • Breaking: Cell types are flat enums: qca_cell_type, qca_cell_mode, mol_qca_cell_type, and inml_magnet_type. mol_qca_layout takes no clocking scheme, and write_mol_qca_layout_svg takes write_mol_qca_layout_svg_params. Cell layouts support copy.copy and ==.

  • Breaking: The Python class sidb_layout names the lattice-based sidb::layout

  • Breaking: critical_temperature_stats.is_ground_state_transparent is renamed energy_between_ground_state_and_first_erroneous, the member it always exposed

  • Breaking: shifted_cartesian_layout, hexagonal_layout, and their gate layouts take a layouts.arrangement as first argument. One class per family replaces the per-arrangement classes, and exact and orthogonal parameters expose layout_arrangement.

  • Breaking: offset_coordinate becomes coordinate, and offset_area becomes area, in mnt.pyfiction.layouts. cube_coordinate, cube_area, cube_volume, and the int_repr constructor are gone.

  • Breaking: coordinate() denotes the origin, and coordinates accept the full signed 32-bit range. Layout extents use extent(width, height, layers) counts. Missing neighbors and empty bounds return None; is_valid() and coordinate sentinels are gone.

Removed

• Build system:

  • Breaking: FICTION_CLI, FICTION_ABC, ABC_ROOT, the deploy preset, and the alice dependency are gone with the C++ command-line interface.

  • Breaking: FICTION_PROGRESS_BARS and mockturtle’s progress bars on std::cout; the on_progress callbacks replace them.

• CLI:

  • Breaking: The C++ command-line interface and shortcuts.fs. Use the Python fiction shell.

  • akers, together with miginvopt and miginvprop. The truth table store now feeds the gate-based SiDB simulations, temp -g and opdom, alone.

  • The alice built-ins alias, set, !<shell command>, -e/--echo, -n/--counter, and help --docs.

• Algorithms:

  • Breaking: reserve_input_nodes is gone. Place each primary input with place or create_pi when its coordinate is known.

• Code quality:

  • Breaking: Removed utils/stl/execution_utils.hpp and its FICTION_EXECUTION_POLICY_* macros.

• Data structures:

  • Breaking: Removed layout volume() and volume_of. Use area() * layers() to count coordinates.

  • Breaking: Layouts now reject more than two layers. Use one ground layer and an optional crossing layer; empty layouts remain supported.

  • Breaking: The traits is_clocked_layout_v, has_synchronization_elements_v, is_tile_based_layout_v, and the capability traits that every gate-level layout satisfies: the clocked-zone traits has_is_incoming_clocked_v, has_is_outgoing_clocked_v, has_foreach_incoming_clocked_zone_v, and has_foreach_outgoing_clocked_zone_v; has_is_obstructed_coordinate_v and has_is_obstructed_connection_v; has_foreach_tile_v, has_foreach_adjacent_tile_v, has_foreach_adjacent_opposite_tiles_v, has_is_gate_tile_v, has_is_wire_tile_v, has_is_empty_tile_v, has_is_empty_cell_v, has_foreach_cell_v, and has_is_empty_v. Use concrete gate-level layout arguments or is_cell_grid_v. The unused is_offset_coord_v and has_offset_coord_v are gone as well.

  • Breaking: The alias wiring_reduction_layout_type; create_wiring_reduction_layout returns a wiring_reduction_layout.

  • Breaking: cell_level_layout; the technology tags qca_technology, mol_qca_technology, inml_technology, and sidb_technology with their predicates and cell_mark enums; the traits technology, has_*_technology_v, is_cell_level_layout_v, and has_post_layout_optimization_v; the aliases qca_cell_clk_lyt, mol_qca_cell_clk_lyt, inml_cell_clk_lyt, sidb_cell_clk_lyt, sidb_cell_clk_lyt_cube, and cell_layout_t; tech_impl_name, tech_cell_name, and to_sidb_layout. Use the technology layouts and is_cell_grid_v.

  • Breaking: The header sidb/technology.hpp. sidb::dot_tag is defined in sidb/layout.hpp, like the cell types of the other technologies.

• Dependencies:

  • Removed the optional TBB dependency.

• Documentation:

  • Removed the bundled overview paper and poster PDFs and their documentation links.

• I/O:

  • Breaking: Removed FQCA and QCA-STACK readers, writers, CLI commands, Python exports, and stacked QCA layout aliases.

• Python bindings:

  • Breaking: Removed the volume function and layout methods. Use area() * layers() to count coordinates.

  • Breaking: Removed stacked_cartesian_layout. Use cartesian_layout with at most two layers.

  • The report methods of the statistics classes that took a C++ output stream, which no Python call could satisfy; repr() returns the same text.

  • Breaking: The classes clocked_cartesian_layout, clocked_shifted_cartesian_layout, clocked_hexagonal_layout, their row and column variants, clocked_stacked_cartesian_layout, and cartesian_obstruction_layout, shifted_cartesian_obstruction_layout, and hexagonal_obstruction_layout. Use the *_gate_layout classes. qca_layout, mol_qca_layout, and inml_layout no longer provide is_incoming_clocked and is_outgoing_clocked.

  • Breaking: The classes qca_technology, mol_qca_technology, and inml_technology. Cell layouts no longer provide clone, obstruction methods, clocked-neighborhood queries, get_cells_by_type, and num_cells_of_given_type; mol_qca_layout has no clocking and no cell modes.

• Breaking: The template SiDB stack. Gone are sidb::surfaces::lattice, defect_surface, charge_distribution_surface, and the lattice orientation tags; model/nm_position.hpp and model/nm_distance.hpp (use lattice::nm_position and lattice::nm_distance); the SiQAD coordinate layouts::coords::siqad with from_siqad/to_siqad (an SQD file’s (n, m, l) triple is a lattice_site); the type aliases sidb_cell_clk_lyt_siqad, sidb_100_*, sidb_111_*, cds_*, and sidb_defect_*; the traits is_siqad_coord_v, has_siqad_coord_v, is_charge_distribution_surface_v, is_sidb_lattice*_v, is_sidb_defect_surface_v, has_*_sidb_defect_v, and has_*_charge_state_v; convert_layout_to_siqad_coordinates, convert_layout_to_fiction_coordinates, and all_coordinates_in_spanned_area (use sidb::sites_in_area); the SiDB branches of bounding_box and print_layout; every template <typename Lyt> overload of the SiDB simulation, analysis, generator, and I/O functions together with legacy_result, legacy_bdl_wire, and legacy_bdl_input_iterator

• Breaking: layouts::are_cell_layouts_identical, layouts::cell_layout_digest, and utils::stl::hash_combine_unordered, which existed only to deduplicate randomly generated SiDB cell-level layouts. generate_multiple_random_layouts deduplicates sidb::layout values directly

• Breaking: layouts::coords::to_cube, the offset-to-cube coordinate conversion, which lost its last caller with the SiQAD coordinate type

• Breaking: sidb::to_cell_level_layout, sidb::to_cell, and sidb::to_cube. Physical design converts in one direction only; use to_lattice_site

• Breaking: The tuple interface of sidb::simulation::logic::parameter_point (get<I>, std::tuple_size, std::tuple_element). It was fixed at two dimensions and would have bound only two of three coordinates in a 3D sweep; use get_parameters()

• The unused pointer aliases sidb_cell_clk_lyt_ptr and sidb_cell_clk_lyt_cube_ptr

• Breaking: The SQD writer takes an sidb::layout and no longer accepts QCA layouts, which it wrote as four dangling bonds per cell. The CLI’s sqd command also takes an sidb::layout

• Breaking: In Python, sidb_technology and its cell_type alias for sidb_dot_tag; no Python API takes an SiDB cell type any more. Use sidb_dot_tag

• Breaking: In Python, sidb_cell_level_layout, sidb_100_lattice, sidb_111_lattice, charge_distribution_surface and its _100/_111 twins with the charge_index_mode, dependent_cell_mode, energy_calculation, charge_distribution_history, and charge_distribution_mode enums, sidb_simulation_result_100/_111, read_sqd_layout_100/_111, sidb_lattice_mode, sidb_nm_position, sidb_nm_distance_100/_111, siqad_coordinate, siqad_area, siqad_volume, to_siqad_coord, to_offset_coord, to_cube_coord, and convert_layout_to_siqad_coordinates. Use sidb_layout, lattice, lattice_site, charge_distribution, sidb_simulation_result, and read_sqd_layout; area accepts an sidb_layout

Fixed

• Algorithms:

  • random_coordinate uses a separate random generator for each thread.

  • Dense distance maps now index every layer and reject coordinates outside the layout frame.

  • Physical-design border calculations and hexagonalization now preserve the maximum signed coordinate.

  • Squared Euclidean distance remains evaluable at compile time under C++20.

  • Squared Euclidean distance now preserves exact integer results and rejects distance-type overflow.

  • Coordinate normalization now shifts out-of-frame cells to the origin and preserves trailing frame padding.

  • Transactional writes now remove read-only temporary files after failed replacement.

  • Fanout substitution now separates repeated gate inputs into distinct routing branches. The algorithm rejects degrees below two and a zero threshold.

  • Fanout substitution now handles the full uint32_t range for degree and threshold.

  • Fanout substitution now preserves logic when the destination elides buffer nodes.

  • DOT drawing progress now reports frame areas beyond the unsigned 32-bit range.

  • Gate-type counting now compiles for native gate layouts with MSVC.

  • On-the-fly SiDB circuit design now rejects unsupported gate types before starting gate design.

  • Random-coordinate sampling now uses independent inclusive bounds for each axis.

  • Routing conflict graphs now detect overlaps after every path mutation and propagate allocation failures.

  • Color routing now supports disjoint paths from one source to distinct inputs of the same gate.

  • Exact placement and GOLD now widen area calculations before multiplication.

  • Layout optimization now accepts interior terminals and clears crossing obstructions when lowering wires.

  • Name restoration now preserves unused inputs and gates that drive outputs.

  • Yen’s algorithm now returns no paths for a zero limit and preserves valid alternatives at each spur node.

  • Path enumeration now reaches occupied crossing-layer targets under the same constraints as A*.

  • Critical-path analysis now handles long routed paths without overflowing the native stack.

  • network_balancing accepts networks without primary outputs.

  • gold counts expansions only when a search-space graph expands.

  • Progress reporters now flush each pass’s final count before a reset.

  • Operational-domain sampling now reports worker activity when it runs on the calling thread.

  • Contour tracing distributes simulation locks across regular parameter grids.

  • SiDB circuit-design exceptions now copy bounded message views without reading past them.

  • Defect-aware circuit design propagates invalid gate-design parameters.

  • Operational-domain analysis now propagates allocation failures, including failures in flood-fill workers.

  • Defect-influence analysis now propagates worker exceptions to the caller.

  • Canvas filtering now rejects SiDBs missing from the simulation state’s layout.

  • Ground State Space reports multiset limits using the potential landscape’s charge base.

  • Multi-threaded exact synchronizes worker contexts and measures one shared timeout budget.

  • SiDB simulation engine lookup now handles non-ASCII input without undefined behavior.

  • GOLD now applies each invocation’s seed and PI-spacing limit independently

  • Operational checks and gate pruning now reject mismatched input counts; band-bending resilience rejects unusable inputs.

  • Gate design now propagates worker exceptions to the caller and sets simulation parameters before launching workers.

  • SiDB simulation, logic matching, and energy labeling now propagate errors from checked charge and potential operations.

  • Time-to-solution now counts failed QuickSim attempts and their elapsed runtime, and handles empty samples.

  • ClusterComplete now assigns distinct queue indices to workers without initial work.

  • Simulation comparison and output now validate distribution sites. Ground State Space uses the landscape’s physical parameters.

  • Parallel SiDB consumers now propagate worker errors and reject QuickSim with charged defects.

  • Concurrent operational-domain and defect-influence searches now use independent random number generators.

  • Binomial coefficients avoid intermediate overflow and saturate at the uint64_t limit

  • Displacement analysis retains layout names and stationary defects

  • Defect influence compares complete ground-state charge vectors

  • SiDB parameter sweeps now reject non-finite ranges, invalid steps, and unrepresentable point counts. Operational-domain ratios also reject malformed seeds and fewer than two sweep dimensions.

  • Population-stability analysis now distinguishes complete charge distributions beyond the charge-index range.

  • Gate design enumerates, counts, and randomly samples only empty, defect-free canvas sites.

  • Combination enumeration throws std::length_error when its result cannot fit in a vector.

  • convert_network keeps the inverters of a technology network when the target network type has no create_node; before, an AIG, XAG, or MIG converted from one lost them

• Build system:

  • Rebuild Python bindings when uncommitted C++ binding sources change.

  • Keep tinyxml2 static across build reconfiguration so Python imports find all libraries.

  • ClangCL test builds skip precompiled headers to avoid corrupted exception copies.

  • QuickSim and ClusterComplete compile with Apple libc++ without experimental library features.

  • CMake accepts Z3 installations inside the source checkout, including Python virtual environments.

  • pyfiction built against such a Z3 finds libz3 at import time, so Read the Docs renders the Python API again.

  • On-the-fly SiDB circuit design from gate-level layouts compiles without Z3.

  • CMake now verifies the fmt 12.2.0 archive with its matching SHA-256 checksum.

  • Installed CMake packages include the fmt headers and their header-only compile definition.

  • CMake installation includes ALGLIB’s generated version metadata.

• CLI:

  • Parallel commands now use one aggregate progress row; exact retains candidate dimensions at count checkpoints.

  • Store listings and command summaries skip layout timing analysis; ps -g computes it on request.

  • Store and statistics displays use readable topology names.

  • TEC readers preserve output drivers instead of inserting output buffers.

  • Large ortho results now finish their statistics calculation while the progress display refreshes.

  • Progress displays now serialize concurrent reports, clear totals for restarted tasks, and respect nested quiet commands.

  • opdom logs its default algorithm as grid search; JSON logs encode non-finite statistics as null.

  • show and write reject unsupported drawing options before writing output. Invalid mapping and numeric inputs preserve stored elements.

  • Hex truth tables retain every bit. Area statistics use each technology’s cell dimensions and the SiDB lattice’s physical extent.

  • Unreadable scripts report the cause and exit with status 2. Interrupted commands retain a log entry and leave the shell usable. Status text accounts for Unicode display widths.

• Code quality:

  • find_first_two_of now returns the end iterator when either range has fewer than two elements.

• Continuous integration:

  • Canceled CI runs now stop optional summary jobs.

  • Docstring generation now loads the libclang development symlink on Ubuntu 26.04.

  • Ubuntu 26.04 jobs now use matching compiler-cache keys and coverage labels.

  • Coverage collection, extraction, and listing now tolerate GCC 13 function-range and hit-count inconsistencies reported by lcov 2.4.

  • Allocation-failure layout tests now link independently of the optional jemalloc allocator.

  • Change detection now allows five minutes for runner setup and file comparisons.

• Data structures:

  • Gate-level layout moves now propagate geometry failures and preserve owned state. Custom geometry controls its assignment failure guarantee.

  • Clocking-state moves now avoid synchronization-map allocations on Windows.

  • Gate-layout name-presence queries now report empty names consistently after failed assignment.

  • Gate-layout name-presence queries now avoid copying names and allocating memory.

  • Cartesian, hexagonal, and gate-layout clocked neighbor visitors now invoke temporary and move-only callbacks as lvalues.

  • Gate-layout crossings now exclude primary input and output terminals.

  • Default OPEN clocking and gate-layout moves now allocate no storage.

  • Gate layouts maintain crossing counts during edits for constant-time queries.

  • Gate-layout wire predicates, counts, and iteration now exclude terminals. Identity-function queries retain them.

  • Python gate-layout constructors now raise ValueError for unknown clocking schemes.

  • Coordinate construction and gate-to-cell conversion now reject narrowing overflow.

  • Cell clock zones now use floor division for negative coordinates.

  • Cell layouts reject zero clock-zone dimensions in constructors and setters.

  • Gate layouts constructed from coordinate layouts initialize their logic functions.

  • Clocked degree counts each eligible neighbor once, including neighbors enabled by synchronization.

  • SiDB result equivalence now compares complete charge distributions beyond the 64-bit charge-index range.

  • Gate- and cell-level layout clones preserve clock overrides without sharing later clock-number edits.

  • clocking::get_scheme now keeps the phase count of 2DDWAVEHEX3 on non-hexagonal layouts.

  • SiDB simulation APIs now reject invalid indices, mismatched distribution sites, and invalid potential-vector sizes. Potential landscapes validate basis indices even for isolated SiDBs and defects.

  • SiDB cell conversion now rejects coordinates outside the target coordinate range.

  • The BDL input iterator now rejects layouts with more than 63 input pairs instead of overflowing its pattern counter.

  • Lattice sites now reject invalid basis indices in construction, geometry queries, and cube conversion.

  • SiDB row conversion and area iteration now handle coordinate limits without signed overflow; defect influence clips to representable sites, and cube conversion rejects rows outside its range

  • Lattice-site arithmetic now rejects coordinate overflow; dot insertion preserves the layout on allocation failure, and moving a defect from an empty site leaves the target unchanged

  • Moving a defect now preserves its target when the site arguments refer to stored defects.

  • Corrected the SiDB pointer aliases in types.hpp and checked their target types.

  • SiDB-to-cell-level conversion preserves bounds from converted cells.

• Documentation:

  • Physical-design statistics now document that wire counts exclude primary inputs and outputs.

  • Gate-level layout editing examples now pass the object ID returned by create_buf.

  • API documentation now resolves current declarations without duplicate enum entries.

  • The documentation session builds Python bindings with the installed Z3 dependency.

  • API links now reveal their language tab. Fixed dark code contrast, source links, and CLI navigation.

  • Nanobind API documentation now keeps its custom class renderer with Sphinx’s deferred registration. Removed duplicate bounding-box entries and corrected the critical-temperature overload reference.

  • Restored Python API entries and method signatures, and formatted generated docstrings.

  • SiDB reader documentation now lists every overload without ambiguous signatures.

• Experiments:

  • Layout experiments now reject failed GENLIB and Verilog reads in Release builds.

  • Clock-number assignment and color-routing experiments copy clocking names into string columns.

  • Layout experiments preserve their wire-count columns with physical wire counts that exclude terminals.

  • SiDB circuit experiments now reject missing placement and equivalence results before reporting.

  • SiDB sweep initializers now name their fields, and pruning helpers propagate allocation failures. Experiment parameters, output columns, and calculations remain unchanged.

  • The Bestagon experiment converts placed SiDB cells to sidb::layout before SQD export and reports input parsing or equivalence-checking failures.

  • The Bestagon critical-temperature domain experiment removes a redundant calculation while preserving its kink-rejection policy and reported temperatures.

  • The library walkthrough writes QCA layouts only in QCADesigner and SVG formats.

• Gate libraries:

  • On-the-fly SiDB gate mapping now rejects column arrangements instead of dropping north/south wires.

  • QCA ONE and ToPoliNano now reject terminal fanouts instead of losing their I/O markers. Connect terminals to separate fanout wires for mapping.

  • Gate-library application assigns the synchronization delay of each tile to its clock zone.

  • ToPoliNano wire optimization now handles two-cell segments and checks every interior cell for obstructions.

• I/O:

  • BLIF network readers now accept empty and whitespace-only lines without aborting.

  • QCC and QLL writers now propagate allocation failures while sorting terminal cells.

  • Gate-layout DOT output now preserves signed coordinate IDs and quoted terminal names.

  • FGL round trips now preserve whitespace-only layout and port names.

  • FGL version 2 now preserves manual obstructions and XML whitespace in names. Readers reject unfinished or physically invalid layouts; writers reject illegal XML control characters before changing output.

  • FGL gate IDs now reject malformed, negative, and out-of-range integers with a parsing error.

  • QCA SVG output now includes synchronized cells in tiled layouts and wraps latch clock labels within the clock cycle.

  • QCA SVG output now preserves synchronized cell positions, draws mixed tiles once, and includes partial boundary tiles.

  • FGL round trips now preserve three-phase clocking across all supported topologies.

  • read_fgl_layout now restores irregular clock numbers on crossing layers.

  • read_fgl_layout now reads BANCS layouts whose clocking scheme is named BANCS3.

  • Network conversion preserves arbitrary gate functions and unused inputs; file bridges retain interface names and output order.

  • Transactional writers now report filesystem setup and replacement errors as stream failures. They preserve output permissions and symbolic links to existing files, and reject dangling links and non-regular output files.

  • Network DOT export uses transactional replacement, including intermediate drawings produced by show.

  • Layout readers reject coordinate overflow; writers replace files only after successful serialization.

  • QCA SVG output now uses valid text colors in simple tile mode.

  • SQD readers now reject fractional coordinates and trailing text in numeric attributes.

  • SQD input now preserves explicit custom lattice geometry, including lattice names and both basis sites

  • SQD cell-level output now propagates exceptions from cell and defect formatting

  • write_sidb_layout_svg now propagates allocation errors when setting colors and formatting lattice points

  • SVG and text output now reject padding outside the lattice-site coordinate range

  • SQD readers now reject empty defect labels, invalid numeric values, and invalid Coulomb parameters. SQD output escapes lattice names, and defect-matrix readers report oversized indices with the documented exception

• Python bindings:

  • Cell-grid clocking names now remain valid when converted to Python strings.

  • Layout object IDs, input ports, and extents now compare unequal to unrelated Python values. Mutable extents are unhashable.

  • layout_input_port now hashes by object identity and input index for set and dictionary keys.

  • Gate-layout editing methods expose their API contracts in Python docstrings.

  • Python port collections now reuse input counts and reserve sink storage.

  • Progress parameters now release unreachable callback cycles owned by parameter values. Borrowed nested parameters preserve callbacks in live owners.

  • copy.copy and copy.deepcopy now preserve gate objects and independently copy layout metadata. Layout simulation extracts ordered logic and rejects incomplete output cones.

  • Linux extensions hide C++ implementation symbols while preserving nanobind’s shared exception ABI.

  • physically_valid_parameters and operational_domain_ratio now release the GIL so worker progress callbacks can execute without deadlocking.

  • Added ordered simulate_outputs, exposed mapper statistics, and validated truth-table sizes and expressions before native operations. Gate-library errors identify unsupported gates and their coordinates.

  • Exposed missing_required_gates_exception so callers can catch technology-mapping failures.

  • design_sidb_gates_stats.__repr__ now converts the statistics string to Python.

  • Exposed the defect-matrix reader exceptions.

  • parameter_point.__getitem__ raises IndexError for an out-of-range index instead of reading past the parameter vector

  • The Python bindings compile when Z3 support is disabled

  • write_sqd_layout owns its Python filename during export on Windows

  • is_clocking_scheme, set_name, and get_name accept Python strings, and the time_total and runtime members of the statistics classes are readable; the casters were missing

  • write_dot_layout draws shifted-Cartesian layouts instead of writing nothing

  • The readers raise RuntimeError with the parser’s diagnostics instead of printing them

  • energy_state and sidb_lattice_mode are importable

  • sidb_defect accepts a call without electric_charge, whose default was a float for an integer parameter

  • create_from_binary_string and create_from_hex_string raise ValueError for a character outside their alphabet; kitty read such a character as a bit pattern and built a wrong truth table

  • write_verilog, write_blif, and write_aiger raise RuntimeError when the file cannot be opened or written; they returned as if they had written it

• Tooling:

  • Git checkouts and formatting hooks enforce LF without rewriting license-only files to CRLF on Windows.

v0.8.0 - 2026-09-02

Fiction when we’re not together; Mistaken for a vision, something of my own creation

—The xx

Added

• Algorithms:

  • Added missing_required_gates_exception, which technology_mapping throws when the gate library lacks a gate the base network type requires

  • Added an is_operational overload that takes one layout per input pattern, and generate_bdl_input_pattern_layouts to generate them

  • Added a critical_temperature_gate_based overload that takes the pre-generated input pattern layouts and BDL detection results instead of deriving them from the layout

  • Added number_of_threads to operational_domain_params, defect_influence_params, and displacement_robustness_domain_params. It defaults to the hardware concurrency, so behavior is unchanged; pinning it makes runtimes reproducible

  • operational_domain_contour_tracing now collects a boundary surface for three or more sweep dimensions, and operational_domain_flood_fill no longer caps at three

  • Added cell_layout_digest, which hashes a cell-level layout in agreement with are_cell_layouts_identical so that callers can group candidates before comparing them exactly

• Build system:

  • Added -DFICTION_ENABLE_TIME_TRACE=ON to emit Clang -ftime-trace compilation profiles

• CLI:

  • Added opdom --sketch/-s, which determines the operational status by filtering instead of by physical simulation. It implies kink rejection, since the filtering steps are only defined there

• Continuous integration:

  • The 🐍 Packaging jobs now run check-sdist --inject-junk, which fails if the source distribution drops a tracked source or ships an untracked one

  • Added a 🐍 Lint job that runs the mypy hook, which pre-commit.ci no longer runs

  • Added a 🐍 Test job that runs nox -s tests and nox -s minimums on Linux, macOS, and Windows against a source build

• Data structures:

  • Added a std::hash specialization for fiction::sidb_defect

  • Added hash_combine_unordered, which folds hash values commutatively and therefore suits containers whose iteration order is not canonical

• Experiments:

  • Added operational_domain_3d_bestagon_grid_vs_sketch, which compares grid search against the operational domain sketch over a three-dimensional parameter space

• Gate libraries:

  • Added sim7_mol_library and mol_qca_technology, which apply the SIM(7)-MolPDK molecular QCA standard-cell library to gate-level layouts, with QLL/SVG export and Python bindings

• Python bindings:

  • Exposed generate_bdl_input_pattern_layouts and the new is_operational and critical_temperature_gate_based overloads

  • Exposed number_of_threads on operational_domain_params and displacement_robustness_domain_params

  • Exposed mol_qca_technology, mol_qca_layout, write_mol_qca_layout_svg, and apply_sim7_mol_library

  • Exposed state_type, which makes calculate_energy_and_state_type_with_kinks_accepted/_rejected and occupation_probability_gate_based callable from Python

• Tooling:

  • Added the license-tools prek hook, which puts an MIT copyright header on every Python file and rewrites any that departs from the canonical text

  • Added the minimums nox session, which runs the Python test suite on Python 3.10 against the lowest declared direct dependencies instead of the newest compatible ones

Changed

• Algorithms:

  • technology_mapping and the map command now default to mockturtle::emap instead of mockturtle::map

  • Breaking: technology_mapping_params::mapper_params and technology_mapping_stats::mapper_stats are now mockturtle::emap_params and mockturtle::emap_stats

  • Breaking: the map command now warns when remapping an already-mapped network and reports mapping errors instead of storing a failed mapping

  • operational_domain and critical_temperature_domain now generate the input pattern layouts once instead of once per sample point, which makes SiQAD grid search about 10% faster

  • Parallelized operational_domain_flood_fill over a pool of worker threads. The result is independent of exploration order and therefore unchanged

  • critical_temperature_domain now reuses the operational domain’s input pattern layouts and BDL detection results instead of re-deriving them for every parameter point

  • is_operational now builds the canvas charge distribution surface once per call instead of once per canvas enumeration

  • bdl_input_iterator now determines the BDL dot distances that decide the input assignment once in its constructor instead of on every increment; they cannot change over its lifetime

  • is_operational_impl no longer detects the output BDL pairs twice under TOLERATE_KINKS

  • quicksim and multi_simulated_annealing no longer pass a parallel execution policy to std::find and std::min_element, whose ranges are too small to pay for the dispatch

  • generate_multiple_random_sidb_layouts now rejects duplicate candidates by digest lookup instead of pairwise comparison. Collecting 4000 layouts of 10 SiDBs takes about 7 ms instead of 160 ms

• Build system:

  • Bumped the required C++ standard from C++17 to C++20

  • Fetch dependencies as release archives instead of git clones, which cuts tests-slim’s _deps from 504 MB to 262 MB. mockturtle stays a clone because it uses a submodule

  • The ci-debug, dev, and tests-slim presets now enable FICTION_LIGHTWEIGHT_DEBUG_BUILDS, which cuts Debug compile time and memory substantially

  • FICTION_ENABLE_PCH now covers the test suite as well as the CLI, and is on in the dev and tests-slim presets

  • The CI presets no longer build the experiments; the 🧪 Experiments job compiles them instead

  • vcs-versioning replaces setuptools-scm for deriving the version from git, which drops setuptools from the build. Building from source now requires scikit-build-core 1.0

  • The CMake policy range now ends at 4.4

• Code quality:

  • Breaking: qca_technology, inml_technology, and sidb_technology now declare cell_type as a scoped enum class. Qualify the enumerators, e.g., sidb_technology::cell_type::INPUT instead of sidb_technology::INPUT, and static_cast wherever a cell type was implicitly converted. pyfiction is unaffected

  • Pruned the include graph of the most widely included headers, keeping nlohmann/json.hpp, fmt, and the vendored combinations.h off the path that traits.hpp pulls in

  • Breaking: moved determine_all_combinations_of_distributing_k_entities_on_n_positions from fiction/utils/math_utils.hpp to the new fiction/utils/combination_utils.hpp. Include the latter to keep using it

  • orthogonal and graph_oriented_layout_design no longer template their implementation on the specification network type. Their public entry points are unchanged

  • Modernized the entire code base for C++20, adopting std::ranges algorithms, concepts, defaulted comparison operators, and designated initializers throughout

  • Replaced unchecked operator[] with bounds-checked at() in the operational domain module

  • The type checks on the path-finding, operational domain, and hexagonal_layout entry points are now requires clauses, so an unsatisfied one is reported at the call site

  • hexagonal_layout now rejects an invalid HexagonalCoordinateSystem where the type is named rather than where it is constructed

  • exact no longer polls its worker futures every 10 ms while solving asynchronously

  • exact now surfaces a failure in one of its asynchronous workers instead of reporting it as “no layout found”

  • Cleared the pre-existing Clang-Tidy findings in exact.hpp

  • Migrated the pyfiction test suite from unittest to pytest and enabled ruff’s PT, PTH, and E501 rule sets. The suite now fails on warnings

  • Every Python file now carries from __future__ import annotations, which ruff’s future-annotations setting assumes

  • Retired ruff’s TODO ignore list. Every entry that remains states a decision in a comment, including CPY001, which stays off because the license-tools hook enforces the headers instead

  • mypy now checks every Python file the repository owns, where it previously checked only the bindings and noxfile.py

• Continuous integration:

  • The docstring generator now parses with a pinned libclang, -std=c++20, and a configured build’s include paths and defines, which drops parse errors from about 180 to zero

  • The twelve workflows are consolidated into ci.yml and cd.yml over a set of callable workflows. Change detection decides what runs, and a single 🚦 Check job aggregates the outcome

  • Action required: the workflows that produced the former status contexts are gone, so an administrator must repoint branch protection at 🚦 Check together with 🔍 Change / 🕵️ Check, pre-commit.ci - pr, and docs/readthedocs.org:fiction. Never require an individual matrix leg; 🚦 Check covers them and survives a matrix change

  • The ci-* presets now reuse the precompiled header that the dev preset already used, which the 120 single-source test executables each paid for separately before

  • The build jobs no longer cap themselves at two hours. Three of them had started failing on that cap rather than on a regression; the short jobs keep a ceiling

  • Publishing moved out of CI: only cd.yml, which runs on a published release, holds the credentials for PyPI, Docker Hub, and ghcr.io

  • The wheel jobs now run whenever anything the extension is compiled from changes, not only when the packaging metadata does

  • Updated the Ubuntu compiler matrix for C++20: dropped g++-10, clang++-14, and clang++-15, and added clang++-19 and clang++-20

  • Halved the OS matrices; docs/getting_started.rst records the combinations we verify

  • The wheel builds now run the pyfiction test suite against the repaired wheel instead of only smoke-testing the import

  • prek now validates .codecov.yml against its schema

  • The prek hooks now carry explicit priorities, which run the read-only checks concurrently and cut a warm prek run -a by about 18%

  • The docstring generator is now a 🐍 Docstrings check that uploads the regenerated header as an artifact and fails when the committed one differs, instead of committing it itself

  • The docstring generator parses the headers in sorted order, so the numbering of repeated symbol names no longer depends on the filesystem’s order

  • Publishing to PyPI runs in a pypi deployment environment, which is where a required reviewer or a wait timer on releases would go

  • The 🐧 Test jobs build with Z3 on ubuntu-24.04-arm as well. cda-tum/setup-z3 does serve an arm64 archive, so the -DFICTION_Z3=OFF override those jobs carried is gone

• Dependencies:

  • Breaking: raised the declared z3-solver floor from 4.8.0 to 4.10.2, the first release with a wheel for every supported platform. Below it, macOS and Linux aarch64 fall back to a source build that modern toolchains reject

  • Bumped the Z3 version pinned in CI and in the Docker image from 4.13.4 to 4.14.1. Newer releases require glibc 2.38, which the ubuntu-22.04 job does not provide

  • The Linux wheels pin z3-solver instead of flooring it, and the aarch64 image moves to manylinux_2_34. The published aarch64 wheel therefore requires glibc 2.34

• Documentation:

  • The README’s six per-workflow status badges are replaced by one CI and one CD badge, matching the two workflows that remain

  • docs/contributing.rst describes the checks a pull request now reports and what 🚦 Check means

• Experiments:

  • Modernized generate_defective_surface.py. Apart from the out-of-bounds fix below, the surface it generates is unchanged

  • generate_defective_surface.py is executable and declares its dependencies in a PEP 723 block, so running it needs nothing installed first

  • generate_defective_surface.py now writes the surface it generates, which it previously discarded, and takes the parameters it used to hard-code as command-line arguments

• Python bindings:

  • Breaking: generated docstring symbols are now named mkd_doc_* instead of the reserved __doc_*. DOC(...) is unchanged; a hand-written docstring that defines such a symbol must be renamed

  • mnt.pyfiction now advertises developers and information technology as intended audiences and physics as a topic on PyPI

  • Adopted nanobind’s split mode, so one abi3 wheel per platform now covers Python 3.10 and up instead of four. mnt.pyfiction gains a nanobind-backend runtime dependency

  • The pyfiction extension no longer re-exports the internals of the tinyxml2, graph-coloring, and ALGLIB archives it embeds, and collects unreferenced sections again. It ships 9.1 MB instead of 12.0 MB

Removed

• Algorithms:

  • Removed Mugen support: the vendored Glucose SAT solver (vendors/mugen/), the onepass CLI command, and one_pass_synthesis(). Use exact_physical_design() instead

  • Removed jump_point_search(). Use a_star() instead

  • Removed qca_energy_dissipation() and the energy CLI command

• Build system:

  • Removed FICTION_ENABLE_UNITY_BUILD, which set a non-propagating property on an INTERFACE target and therefore never did anything

• CLI:

  • Removed the --logic_sharing flag from map, which mockturtle::emap does not support

• Continuous integration:

  • Removed the 🐍 CI workflow; the wheel builds now cover the same ground. nox -s tests remains the local entry point

• Data structures:

  • Removed range_t (fiction/utils/range.hpp); coordinates() and ground_coordinates() now return a std::ranges::subrange, with no change in usage

• Python bindings:

  • Removed the free-threaded (cp314t) wheel; free-threaded interpreters stay unsupported until Python 3.15 gives them the abi3t stable ABI (PEP 803)

  • Removed the DISABLE_GIL scikit-build-core override for free-threaded Windows builds. No CMake code ever read the define, and split mode rejects free-threaded interpreters outright

Fixed

• Algorithms:

  • Requesting the operational domain sketch (FILTER_ONLY) without REJECT_KINKS or on a layout without LOGIC cells now throws instead of silently simulating the whole parameter space

  • Fixed a division by zero in the parallel operational domain, defect influence, and displacement robustness helpers, which divided by a worker count of zero when there is no work at all. operational_domain_random_sampling with samples = 0 reached it

  • Fixed is_operational reporting every layout operational without checking it when FILTER_ONLY was combined with TOLERATE_KINKS. All entry points now decide canvas filtering in one place

  • Fixed the enclosure inference of operational_domain_contour_tracing, which an inverted guard had left permanently inactive, so its flood fill could suppress the tracing of other operational islands

  • Fixed an off-by-one in operational_domain_contour_tracing’s boundary search that skipped the first sweep dimension’s lowest step index, marking every reachable point operational without simulation

  • Fixed a data race on quicksim’s timeout flag, which every worker thread wrote as a plain bool. It is now std::atomic_bool

• Build system:

  • .gitignore now covers the build, virtual environment, and editor droppings that a local uv build --sdist would otherwise ship into the source distribution

  • Fixed the source distribution shipping none of the C++ sources it needs to build, which made pip install mnt.pyfiction fail wherever no matching wheel exists

• CLI:

  • Updated the qll command’s description to mention molQCA layouts and SCERPA simulations

• Code quality:

  • Fixed the execution-policy guard in execution_utils.hpp, which read the feature-test macros before including <version> and disabled parallel STL algorithms on every Clang build

  • Fixed several fmt compile-time format-string misuses surfaced by the C++20 bump

  • Fixed std::string_view::data() calls that assumed null termination, which std::string_view does not guarantee

  • Fixed plain char values being passed to ::toupper, ::tolower, ::isdigit, and ::isxdigit, which is undefined behavior on platforms with a signed char

  • Fixed a signed-integer overflow in to_siqad_coord for the minimum representable y value

• Continuous integration:

  • Renamed .readthedocs.yml to .readthedocs.yaml, the name the preview guard and the check-readthedocs hook expect, so editing the file rebuilds the documentation preview

  • Publishing the Docker image no longer clears its Docker Hub short description, which it derived from a field that never held one

  • Fixed the Renovate github-tags custom managers to reference owner/repository package names instead of full GitHub URLs, which the datasource requires to resolve tags

  • Fixed patch-level CMake GIT_TAG bumps being eligible for Renovate’s automerge

  • Pinned the vendored alice dependency’s GIT_TAG to a fixed commit carrying a C++20 fix, instead of floating on master

  • Fixed ccache being skipped on every ubuntu-24.04-arm job, leaving the slowest runners cold

  • Fixed the CodeQL ccache key interpolating an undefined matrix.os

  • The CodeQL jobs now declare their build mode: manual for C++, whose database comes from the CMake build, and none for Python, which has no build

  • Fixed the packaging path filter still pointing at the removed bindings/pyfiction/**

• Documentation:

  • Fixed the doc_overview_table directive rendering None in the description column for a function without a Doxygen brief description

• Experiments:

  • Breaking: fixed the always-false out-of-bounds guard in generate_defective_surface.py that let a defect be placed clipped at the surface edge. The generated surface changes

  • generate_defective_surface.py now rejects a coverage outside [0.0, 1.0] and a non-positive surface dimension, where it used to write an empty surface and report success

• I/O:

  • Fixed write_qca_layout_svg’s simple-mode output emitting malformed fill:##000000 for constant-0/1 QCA cells instead of fill:#000000

• Python bindings:

  • Fixed the sidb_defect operator!= binding, which referenced a docstring symbol that is no longer emitted now that the operator is compiler-synthesized

  • Fixed nine DOC(...) references that named symbols the broken parse had invented; the *_stats runtime members are now documented under their real names

  • Fixed bdl_input_iterator.py never being collected, as its name did not match pytest’s python_files pattern, so its five tests had never run

v0.7.0 - 2026-07-31

Cliché or not, “stranger than fiction” expresses exactly how I feel about the truth.

—Richard Dawkins

Added

• Documentation:

  • Added AGENTS.md to guide AI agents in the repository

• Build system:

  • Added CMakePresets.json with presets for common local development workflows (dev, dev-asan, dev-full, release, deploy, coverage) as well as CI-mirroring presets (ci-debug, ci-release, ci-codeql, ci-tidy) that let CI failures be reproduced locally with a single cmake --preset <name> invocation

  • Added support for CMake version 4+

• Tooling:

  • Added the following pre-commit hooks:

    • check-vcs-permalinks

    • check-symlinks

    • check-json

    • cmake-format-precommit

    • uv-pre-commit

  • Enabled auto-merging stable non-major dependency releases via Renovate

• Continuous integration:

  • Added a 🌈 Zizmor workflow that statically analyzes the GitHub Actions workflows for security issues on every push, pull request, and merge group, and uploads findings to the code scanning API; fork pull requests print findings to the log instead, since their read-only token can’t upload to it

Changed

• Build system:

  • Restructured the CLI command implementation to improve code organization, modularity, and compilation speed

  • Refactored the entire CMake build system to use FetchContent for dependency management instead of git submodules

  • Moved vendored libraries from libs/ to vendors/

  • Improved build configuration and option handling for better modularity

  • Addressed several CMake and compiler warnings (including CMP0148 and Pybind11 compatibility) as well as CMake code smells

  • Streamlined package installation and discovery process

• Continuous integration:

  • The 🐧/🍎/🪟 CI, ☂️ Coverage, and 📝 CodeQL workflows, the Clang-Tidy Review workflow, and the Docker build now configure via the new CMake presets instead of hand-rolled -D flag lists

  • The 🔖 Release Drafter workflow now runs on the smaller ubuntu-slim runner instead of ubuntu-latest, since it only calls the GitHub API and needs no compiler toolchain

  • Hardened every workflow against the findings from the new 🌈 Zizmor workflow: scoped permissions blocks to the minimum each job needs (instead of relying on the broad default), set persist-credentials: false on checkouts that don’t push, routed matrix/workspace values through env vars instead of interpolating them directly into shell commands, and disabled the PyPI packaging workflow’s build cache to close a cache-poisoning path into published artifacts

• Python bindings:

  • Restructured the pyfiction bindings to use multiple translation units (one .cpp file per binding) for better modularity and faster incremental compilation

• Tooling:

  • Replaced pre-commit with prek, a faster Rust reimplementation that stays compatible with pre-commit.ci

• Dependencies:

  • Updated all dependencies to their latest versions

Fixed

• Code quality:

  • Addressed several clang-tidy warnings throughout the code base

  • Addressed several CodeQL findings: a potential unsigned-subtraction underflow in a test assertion, an unnecessarily nested switch over a single-valued enum, imprecise assertTrue(a == b)-style Python test assertions, a duplicate import/from ... import of the same module, an unused local variable, and dead code

• Continuous integration:

  • Fixed Renovate attempting to bump the sphinx pin used for Python <3.11, which is unsupported by Sphinx 8.2+

  • Excluded vendored third-party dependencies (fetched via CMake FetchContent) and the purely stylistic cpp/poorly-documented-function query from CodeQL analysis, removing hundreds of alerts this project cannot act on

• Documentation:

  • Fixed several stale **Header:** references pointing at renamed header files

  • Fixed an inconsistent fiction:: namespace omission in a doxygenfunction directive

  • Fixed a duplicated doxygenstruct directive for displacement_robustness_domain

  • Fixed broken :ref: links in the publications list

  • Added missing Python binding exports (charge_distribution_history, sidb_charge_states_for_base_number) that were referenced by the documentation but not importable

• Python bindings:

  • Added missing docstrings for numerous pyfiction constructors (e.g., cartesian_gate_layout) that were previously undocumented despite an equivalent, documented constructor overload existing

  • Added missing docstrings for several dunder/operator methods (e.g., bdl_input_iterator_params, __repr__, __hash__, __getitem__) across the layout, network, and SiDB simulation bindings

v0.6.12 - 2025-10-29

Added

• Algorithms:

  • Random fanout substitution strategy

  • Maximum-effort mode in gold utilizing random fanout substitution strategies and random topological orderings to design high-quality layouts

  • Flag in gold to enforce NOT gates to be routed non-bending only

  • Parameter in gold to skip tiles when placing PIs, leading to higher success probabilities in discovering layouts

  • Flag in gold to randomize the number of skipped tiles when placing PIs

  • Improved performance of hexagonalization

  • Improved performance of SiDB simulation algorithms through changes in the underlying data structures

  • Reimplementation of Graphviz’s “Mincross” algorithm

  • Breadth-first topological view

  • PRUNING_BASED option for SiDB gate design to speed up the design process by pruning non-operational layouts

• Experiments:

  • Figures-of-Merit (FoM) SiDB layout analysis experiment script

  • QuickCell experiment script

  • Minimal SiDB gate design experiment script

• Continuous integration:

  • Python 3.14 support

• Documentation:

  • References to newly published papers

Changed

• CLI:

  • area now outputs the layout width and height in addition to the area

• Continuous integration:

  • Switched to the Ninja generator for Windows CI builds

• Documentation:

  • Modernized README and Getting Started section of the documentation

• Dependencies:

  • Updated all dependencies to their latest versions

Fixed

• Data structures:

  • Fixed I/O cell handling in cell_level_layout’s assign_cell_type member function

  • Fixed system energy calculation in charge_distribution_surface in corner cases

  • Added missing clone member functions to pyfiction’s SiDB lattices

• Algorithms:

  • Fixed a corner case in hexagonalization when extending POs to the bottom border

  • Fixed a bug in post_layout_optimization and wiring_reduction that lead to POs not being placed at the borders and possibly dying

  • Fixed band_bending_resilience calculation of SiDB layouts for unspecified transition types

• Experiments:

  • Experiment scripts requiring ALGLIB now prompt an error message instead of failing to compile when the library is not found

• Continuous integration:

  • clang-tidy CI workflow no longer fails when run from forks

• Code quality:

  • Addressed several clang-tidy warnings throughout the code base

Removed

• Continuous integration:

  • macOS 13 has been removed, along with support for the x86_64 (Intel) architecture

  • Dropped Windows 2019 and v142 support

  • Dropped Python 3.9 support due to its end-of-life status

v0.6.11 - 2025-04-23

Added

• Algorithms:

  • Parameters to move inputs to top border or outputs to the bottom border after hexagonalization

• Experiments:

  • Added experiment for a comprehensive analysis of the critical temperature domain

  • Added total simulation runtime to physical simulation experiment

• Python bindings:

  • Pythonic dictionary-like interface for operational_domain and critical_temperature_domain

Changed

• Documentation:

  • Modernized the documentation builds by migrating the RTD build from pip to uv

• Algorithms:

  • Refactored QuickSim to remove magic number for upper limit calculation

  • Refactored random layout design functions

Fixed

• Fixed a bug in the z-dimension when determining the aspect ratio for cell-level layouts

• Fixed an issue in the TTS calculation caused by the automatic base detection being activated

• Fixed links in the README due to the migration of the mqt-core repository to a new namespace

• Exclude ClusterComplete from simulation engine selection when ALGBLIB is disabled

• Fixed inconsistencies and various bugs in SiDB simulation/analysis

• Fixed LT, LE, GT, and LE gate handling in the gate-level-layout and the corresponding read and write functions

• Fixed a bug in the crossing count calculation of gate-level layouts

• Increased floating point precision to avoid undetected degeneracy in the physical simulation of SiDB layouts

v0.6.10 - 2025-02-21

Added

• Algorithms:

  • Added parameters to extend the PIs to the first layout row or POs to the last layout row after hexagonalization

Fixed

• Fixed the Python bindings for the critical temperature domain simulation

v0.6.9 - 2025-02-12

Added

• Algorithms:

  • Added ClusterComplete, a novel exact physical simulator for SiDB layouts with substantially improved runtimes, allowing the simulation of multi-gate SiDB layouts

  • Added temperature-aware operational domain simulation and restructured the function to simplify the integration of additional figures of merit in the future

Changed

• Build and documentation:

  • Added optional usage of jemalloc to speed up certain parallelized applications

Fixed

• Algorithms:

  • Fixed a bug in apply_gate_library that resulted in incorrect cell-level layout sizing

• Build and documentation:

  • Added a CMake file for detecting pre-installed jemalloc

• Experiments:

  • Fixed a non-critical bug that occurred when ALGLIB was disabled

v0.6.8 - 2025-01-25

Added

• Data structures:

  • virtual_pi_network that allows for the duplication of input signals

  • mutable_rank_view that allows for the reordering of nodes

  • static_depth_view that disables depth recomputation

• Algorithms:

  • Logic synthesis:

    • Equivalence checking for networks with virtual PIs

• Clocking schemes:

  • SRS

• Continuous integration:

  • Added Linux on ARM runners

Fixed

• Continuous deployment:

  • Fixed a critical issue with wheel building and deployment to PyPI that caused some operating systems to not be served

• Experiments:

  • Fixed outdated paths in the QuickCell experiment script

v0.6.7 - 2025-01-20

Added

• Algorithms:

  • Simulation:

    • Implemented new algorithms utilizing grid search, random sampling, and contour tracing to determine defect clearance distances of SiDB layouts

    • Restructured defect influence simulation for enhanced usability

    • Integrated QuickCell's pruning strategies to efficiently identify non-operational layouts

• Experiments:

  • Added rectangular SiDB gate skeletons (16.896 nm x 16.896 nm) and a script for designing a corresponding library

  • Enhanced results tables in the QuickCell experiment script with information about how many layouts remain and are pruned at each pruning step

• Continuous integration:

  • Added MacOS 15 and Windows 2025 to the CI

  • Added Renovate to keep dependencies up-to-date

  • Added ruff as a Python linter and mypy for static Python type checking. Extended the pre-commit configuration with check-jsonschema, validate-pyproject-schema-store, nb-clean, prettier, ruff, and mypy

• CLI:

  • Added an optional callback to ABC in fiction’s CLI

Changed

• Continuous integration:

  • Updated the workflow to reduce runtime when building the wheels by excluding redundant combinations of OSs and Python versions

Fixed

• Fixed a bug in the show command of the CLI

Removed

• Continuous integration:

  • Dropped Python 3.8 support due to its end-of-life status

  • Dropped Dependabot

v0.6.6 - 2024-11-26

Added

• Algorithms:

  • Simulation:

    • Added option to determine if kinks induce layout to become non-operational

    • Kink control option for critical temperature simulation of SiDB layouts

• Python bindings:

  • Support for Python 3.13 (including GIL-free multi-threading)

• I/O:

  • SVG drawer for SiDB layouts

• Experiments:

  • Ship the SiQAD and Bestagon gate libraries as SQD files

• Documentation:

  • Added wiring reduction paper to publication list

  • Added Willem Lambooy to the authors list

• Continuous integration:

  • Several improvements to the Docker workflow including publishing images to DockerHub

Changed

• Continuous integration:

  • Exclude long-running tests from the Debug CI workflows

Fixed

• Fixed a bug in SiDB gate design when using skeletons with I/O wires facing east

• Adapted post-layout optimization and wiring reduction to handle layouts with PIs not placed at the borders

• Fix neutral defect handling in CDS and correct gate design termination condition

• Enforce runtime evaluation of dynamic formatting strings to fix consteval contexts

• Microsoft logo in CI badge by replacing the logo slug with a base64 encoding of the SVG image

• Remove explicit XCode version setup for macOS 13 CIs

• Adjusted PyPI deployment target for macOS

• Several bugs resulting from the new cell_type::LOGIC in the SiDB technology

• Several compiler and linter warnings

• Documentation for BDL wire detection

v0.6.5 - 2024-10-22

Added

• Experiments:

  • Script to simulate the critical temperature of SiQAD and Bestagon gates

• Algorithms:

  • Physical Design:

    • QuickCell algorithm for automatic standard cell design in silicon dangling bond logic

    • Added an option to GOLD to specify discretionary cost objectives

    • Added a flag to GOLD to enable multi-threading

    • Added a timeout option to post-layout optimization

  • Simulation:

    • Added support for different ways of implementing input information in SiDB technology to the BDL input iterator

    • Extended BDL input iterator to support different SiDB input representations

• Documentation:

  • Added a CITATION.cff file

  • Added documentation on our latest papers from IEEE-NANO

Fixed

• Addressed some clang-tidy warnings

v0.6.4 - 2024-08-30

Added

• Algorithms:

  • Path-finding:

    • Squared Euclidean distance function

    • Chebyshev distance function

• Data structures:

  • gate_level_layout now tracks its number of crossings

• CLI:

  • ps -g and store -g now display the current gate_level_layout’s number of crossings

Fixed

• Fixed disappearing clocking schemes when applying a gate library to a gate-level layout

• Fixed a few oversights in the RTD documentation of SiDB simulation functionality

• Fixed several typos and docstrings in the codebase

• Addressed some clang-tidy warnings

v0.6.3 - 2024-08-22

Added

• Algorithms:

  • Physical Design:

    • Graph-Oriented Layout Design (GOLD) for 2DDWave-clocked Cartesian gate-level layouts to trade-off runtime vs. result quality (based on this paper)

    • Flag for planar post-layout optimization

    • Flag for optimizing POs only in post-layout optimization

  • Simulation:

    • Defect-aware on-the-fly SiDB circuit design on defective H-Si surfaces (based on this paper)

    • Displacement robustness domain simulation for SiDB layouts

    • Finding valid physical parameters for a given SiDB layout charge distribution

    • Multi-dimensional operational domain computation for SiDB layouts

Changed

• Switched from execution policy-based multithreading to manual thread management in operational domain computation for platform-independence and better performance in the Python bindings

• Extended time-to-solution (TTS) calculation functions

• Add a warning when leak sanitizers are used with AppleClang since they are not supported

• Switched to new compiler and OS versions in the GitHub Actions workflows

• Updated all libraries to the latest versions

Fixed

• Utilizing tolerance to mitigate floating-point inaccuracies in operational domain computation

• Some bugs in post-layout optimization

• Corner case in ortho regarding multi-output nodes

• Enable relocation of all 2-input gates during post-layout optimization

v0.6.2 - 2024-05-22

Added

• Experiments:

  • Script for runtime evaluation of ExGS, QuickExact, and QuickSim on the Bestagon gate set

Fixed

• Python bindings:

  • detect_bdl_pairs no longer require the _100 or _111 suffix

  • Minor inconsistencies

v0.6.1 - 2024-05-16

Added

• Utils:

  • Truth table helpers for the creation of 3-input functions (NPN class representatives)

• Documentation:

  • Information on hexagonalization and post-layout optimization in README and ReadTheDocs

Changed

• Continuous integration:

  • Limit the number of CI runs for PyPI deployment

Fixed

• Continuous deployment:

  • Fixed the PyPI deployment workflow to publish all wheels properly

v0.6.0 - 2024-05-05

When it comes to the past, everyone writes fiction. — Stephen King

Added

• Python bindings:

  • Python bindings for most of the core functionality of fiction using pybind11

  • Hosted on PyPI

• Technology:

  • H-Si lattice orientation support

    • H-Si(100)-2x1

    • H-Si(111)-1x1

• Algorithms:

  • Post-layout optimization and wiring reduction for 2DDWave-clocked Cartesian gate-level layouts (based on this paper)

  • SAT-based clock number assignment

  • Added an upper bound option for the total layout area to exact

  • Automatic and exhaustive SiDB gate designer (based on this paper)

  • Operational domain computation for SiDB layouts (based on this paper)

  • Novel SiDB simulator quickexact for exhaustive but fast SiDB layout simulation including atomic defects (based on this paper)

  • Random SiDB layout generator

  • 2DDWave distance function

  • Hexagonalization algorithm for transforming Cartesian 2DDWave-clocked layouts into ROW-clocked hexagonal layouts (based on this paper)

  • Temperature-aware SiDB simulation (based on this paper)

  • Atomic defect-aware physical design for SiDB layouts. Many thanks to Jeremiah Croshaw and Samuel Sze Hang Ng for the collaboration on the paper!

• Data types:

  • Distance maps for faster path-finding via caching or pre-computation

  • Enable coord_iterator for siqad::coord_t

• I/O:

  • Unified print_layout function for all layout types

  • Support charge_distribution_surface in print_layout

  • Support atomic defects in print_layout

  • Support atomic defects in reading and writing SQD files

  • Proprietary file format writer for SiDB layouts together with simulation results

  • SiDB simulation file writer for SiQAD

• Clocking schemes:

  • Ripple

• CLI:

  • Commands miginvopt and miginvprop for MIG network optimization and inverter propagation from mockturtle

• Utils:

  • Function to round a number to n decimal places

• Libraries:

  • Updated all libraries to the latest versions

• Continuous integration:

  • Added a workflow to build and test the Python bindings

  • Added a workflow to publish the Python bindings to PyPI

  • Added a workflow to extract the docstrings from C++ to make them available in Python

  • Added a CodeCov configuration file

  • Setup pre-commit checks for code formatting and linting

• Build and documentation:

  • Added documentation on the Python bindings

  • Overhauled the README

  • Flags to partially compile select features of the CLI

  • Added latest paper references to the documentation

  • Added the new Munich Nanotech Toolkit logo

  • Added missing thanks to Giuliana Beretta

  • Added contribution and support info

• Benchmarks:

  • Combinational networks from the IWLS93 suite

  • Code benchmarking via Catch2

Changed

• Usability:

  • Added return types to the area, critical_path_length_and_throughput, and equivalence_checking functions instead of relying on the passed statistics objects

  • Refactored the technology mapping interface

  • Enabled offset::ucoord_t and cube::coord_t as coordinate types for SiDB simulations

  • Enhanced path-finding versatility by enabling them on all layout abstractions

  • random_coordinate function for all layout types

  • Added the EPFL and ISCAS85 benchmarks to the benchmark selector in the experiments

  • Changed the unit of the lambda_tf physical parameter from meter to nanometer

• Continuous integration:

  • Increased parallelism for building and testing in the Ubuntu and Windows workflows

  • Use mold instead of ld for faster link times

  • Switched to the newest OS versions in the GitHub Actions workflows

• Build and documentation:

  • Overhauled and modernized the CMake build system

  • Updated the Doxygen documentation system

• Linting:

  • Make ClangFormat aware of different line ending types and enforce LF

• Miscellaneous:

  • Updated the linguist attributes

  • fiction moved to the cda-tum GitHub organization

Fixed

• Minor oversights in using static constexpr and noexcept

• Fixed conversion of cube coordinate with negative y-value to SiQAD coordinate

• Fixed an inconsistency in SiDB layout printing

• Fixed hop energy calculation from neutral to positive SiDB

• read_sqd_layout now updates the aspect ratio properly for SiQAD-coordinate based layouts

• Atomic defects can now be updated and new ones can be assigned to specific coordinates

• Case style of experiments folders corrected in fiction_experiments.hpp

• Fixed CodeQL warnings

• Fixed a bug that caused pre-mature termination of sidb_surface_analysis

• Fixed design-rule violation testing and equivalence checking on empty gate-level layouts

• Fixed compiler warnings

• Fixed a documentation bug in the physical constants section

• Fixed the bug that some physical parameters were not correctly passed to the simulators

• Fixed equivalence_checking on obstruction_layout objects

• Fixed fragments from the move to cda-tum and adjusted the tracking of publications

• Missing physical validity check in quicksim for special cases

• Bug fixes and improvements related to the coordinate system

• Fixed wrong SiDB locations in a Bestagon tile’s input wire

• Fixed an issue with charge_distribution_surface not being recognized as a cell_level_layout

• Fixed port routing determination for unconnected gates in the Bestagon library

v0.5.0 - 2023-03-30

Fiction is a way to challenge the status quo and to push the boundaries of conventional thinking. — unknown

Added

• Technology:

  • Support for the SiDB Bestagon gate library, a standard-tile library for the SiDB technology based on hexagonal grids. Many thanks to Samuel Sze Hang Ng for the collaboration on the paper!

  • Support for charge states of SiDBs

• Algorithms:

  • Electrostatic ground state simulation for SiDB cell-level layouts

    • Exhaustive simulation

    • Heuristic simulation

    • Energy calculations

  • Four established path-finding algorithms on arbitrary layouts with arbitrary clocking schemes

    • Recursive enumeration of all possible paths

    • A* for the shortest path

    • Jump Point Search (JPS) for the shortest path (proof-of-concept)

    • k shortest paths via Yen’s algorithm

  • Distance functions and functors for layouts

    • Manhattan distance

    • Euclidean distance

    • A* distance

  • Cost functions and functors for layouts

    • Unit cost

    • Random cost

  • Graph coloring with a selection of SAT solvers or heuristic algorithms

  • Efficient multi-path signal routing on gate-level layouts (based on this paper)

  • Specify a black list of tiles and gates to avoid in exact physical design

  • Generic function optimizer based on simulated annealing

• Data types:

  • Obstruction layout to represent obstacles in a layout

  • Edge intersection graphs from enumerated routing paths

  • Charge distribution surface for SiDB layouts

  • Coordinate type siqad::coord_t representing signed SiDB coordinates as represented in SiQAD

• I/O:

  • Molecular FCN support in the QLL writer for MagCAD and SCERPA (many thanks to Giuliana Beretta!)

  • SQD reader for the SiDB technology

• Clocking Schemes:

  • CFE

• Traits:

  • has_*_technology traits to check for specific cell technologies of layouts and libraries

• Utils:

  • Routing utils

  • STL extensions

  • Truth table utils

• Libraries:

  • phmap for faster hash maps (applied in many core data structures for performance reasons)

  • TinyXML2 for XML parsing

• Continuous integration:

  • clang-tidy workflow for static code analysis

  • ClangFormat workflow for automatic code formatting

  • Release Drafter workflow to keep an up-to-date changelog for the next release

  • Docker image workflow to build Docker images for the latest release

• Build and documentation:

  • Automatic linking with TBB for parallel algorithms

  • Dependabot to automatically keep the dependencies up-to-date

  • CodeQL to automatically scan the code for security vulnerabilities

  • GitHub templates for issues and pull requests

Changed

• CLI:

  • Split exact’s and onepass’ parameter upper_bound into upper_x and upper_y

• Clocking schemes:

  • Renamed ESP to ESR

• Libraries:

  • Updated all libraries to the latest versions

  • Moved to the upstream version of Catch2 v3

• Continuous integration:

  • Updated CI runners to the latest versions

  • Setup Z3 via a designated action. Many thanks to Lukas Burgholzer for his support!

  • Enabled Ccache for faster compilation in CIs

  • Activated experiments in CI builds to ensure that they are building correctly

  • Run CI only when relevant files have changed

  • Switched to single-threaded builds in CI to avoid out-of-memory issues

• Build and documentation:

  • Refactored the CMake buildsystem

  • Improved the README and the documentation

Fixed

• Compilation issues when a certain header was included multiple times

• Exclusion of experiment compilation if Z3 is not found

• Wrong DOT drawer in write_dot_layout

• MSVC compilation issues

• Performance issues with foreach_* functions on layout types

• Performance issues with std::string where std::string_view was sufficient

• Regex in the FQCA reader

• Issue with clear_tile that would lose track of PI and PO count

• Duplicate crossing cells in the iNML ToPoliNano library

• Several I/O issues in the CLI

• Excess template parameter in the restore_names utility function

• Errors with the CMake build system if IPO was enabled through multiple sources

• Linker errors and CMake name collisions

• Warnings detected by CodeQL

Removed

• LGTM badge as the service is no longer available

v0.4.0 - 2022-01-27

Fiction is about stuff that’s screwed up. — Nancy Kress

Added

• Technology:

  • Support for the Silicon Dangling Bond (SiDB) technology with SiQAD tool support. Many thanks to Samuel Sze Hang Ng for the collaboration!

  • Support for 3D QCA layouts with QCA-STACK tool support. Many thanks to Willem Lambooy for the collaboration!

• Data types:

  • New coordinate type cube::coord_t representing signed cube coordinates

  • New layout type hexagonal_layout representing a grid of hexagonal tiles

  • New layout type shifted_cartesian_layout replacing the offset parameter of legacy fcn_layout

  • New layout type synchronization_element_layout replacing the clock_latch member of legacy fcn_layout

  • New layout types cartesian_layout, tile_based_layout, gate_level_layout, and cell_level_layout replacing various aspects of legacy fcn_layout, fcn_gate_layout, and fcn_cell_layout types

  • All layout types can be layered to expand their functionality, e.g., a clocked Cartesian layout type with offset coordinates results from clocked_layout<cartesian_layout<offset::ucoord_t>>

  • Support for arbitrary mockturtle logic networks as layout specifications

  • New logic network type technology_network replacing legacy logic_network type

  • New view types that can be layered on top of networks reverse_topo_view and out_of_place_edge_color_view refactoring aspects from the ortho algorithm out into their own data structures

• Traits:

  • Added a trait system that can identify the appropriateness of a data type for the usage as parameter to an algorithm at compile time

  • Many traits are provided out-of-the-box like checks for the existence of certain functions or members, e.g., is_clocked_layout or has_foreach_tile

  • Some pre-defined types used within the CLI can be found in the types.hpp file

• Algorithms:

  • convert_network as an extension of mockturtle::cleanup_dangling to convert between extended logic network types

  • apply_gate_library to provide an interface that generates any cell-level layout type from any gate-level layout type via the application of any gate library type

• Clocking schemes:

  • Columnar

  • Row-based

  • ESP

• Visualization:

  • Custom write_dot_layout function that creates Graphviz DOT files from gate-level layouts together with custom DOT drawers for various layout types

  • Custom technology_dot_drawer as an extension to mockturtle::gate_dot_drawer that supports more gate types

• CLI:

  • Command map for technology mapping of logic networks using a given set of gate functions. Many thanks to Alessandro Tempia Calvino for his support!

  • Command sqd to write SiDB layouts to SiQAD files

  • Command qll to write iNML layouts to ToPoliNano & MagCAD files (complements the existing qcc command)

  • Command fqca to write QCA layouts to QCA-STACK files

  • Command blif to write logic networks to BLIF files

  • Added option --hex to exact and ortho instructing the algorithms to create a hexagonal layout instead of a Cartesian one. The option expects a hexagonal orientation that has to be one of the following odd_row, even_row, odd_column, or even_column

• Utility:

  • Added utility functions for networks, layouts, placement, names, arrays, ranges, and hashing to the utils folder

• Build and documentation:

  • Option to disable the CLI to be built

  • Option to enable tests to be built

  • Option to enable experiments to be built

  • Code coverage CI via Codecov

  • Online documentation via Readthedocs

  • Code quality analysis via LGTM. Many thanks to Stefan Hillmich for his support!

Changed

• Architecture:

  • Reworked fiction into a platform that offers

    1. a header-only template library for use in external projects, 2. a CLI built upon said library that provides the established functionality (plus the new additions), 3. a framework for experiments that allows to quickly prototype ideas and compile them as stand-alone binaries built with fiction

  • Reworked the CMake build system to be simpler to use, yet more capable

  • Templatized all algorithms and data structures and switched to a trait-based API system. This allows for far more flexible system and the support of any type that implements certain functionality via duck typing

• CLI:

  • Command read can now also parse BLIF and FQCA files

  • Command read can now create various types of logic networks from parsing input files. A flag determines which one to create, e.g., --aig, --mig, or --xag

  • Command gates supports more gate types now including the 3-input gates presented in Marakkalage et al.

  • exact --clock_latches/-l has been renamed to exact --sync_elems/-e

  • A technology flag --topolinano has been added to exact instructing it to respect ToPoliNano’s requirements for iNML layouts

  • The ToPoliNano clocking scheme has been renamed to Columnar

• Continuous Integration:

  • Moved from Travis CI to GitHub Actions with CI builds and testing under ubuntu, macOS, and Windows

• Build & Documentation:

  • Z3 is now an optional dependency that can be found automatically by fiction when -DFICTION_Z3=ON is passed to cmake. If it is not found, some algorithms are simply excluded from compilation

  • Trimmed README in favor of Readthedocs

Fixed

• Compilation issues under Windows

• SEGFAULT when using ortho under rare circumstances

Removed

• Third-party dependencies:

  • Boost

  • Z3 (now optional)

  • cppitertools

• Data types:

  • fcn_gate_layout (replaced with the is_gate_level_layout trait)

  • fcn_cell_layout (replaced with the is_cell_level_layout trait)

  • logic_network (replaced with the mockturtle::is_network_type trait)

• CLI:

  • ortho -b flag because routing border I/Os is the default behavior now

v0.3.2 - 2021-01-06

Sometimes fiction is more easily understood than true events. — Young-ha Kim

Added

• Command onepass for a combined SAT-based logic synthesis and physical design using Mugen. Thanks to Winston Haaswijk for cooperating with us on this project!

• SVG output for irregular (cell-based) clocked fcn_cell_layouts (thanks to Sophia Kuhn!)

• csv_writer for conveniently formatting experiments’ results

• tt_reader for reading truth tables from a file format used by Alan Mishchenko

Changed

• exact --asynchronous/-a has been renamed to exact --async/-a and exact --asynchronous_max/-A has been renamed to exact --async_max

• outsourced Verilog and AIGER file handling into a distinct network_reader class so that it can be used in custom experiments

Fixed

• Docker build that broke down due to updates to mockturtle and bill

v0.3.1 - 2020-06-04

There is no doubt fiction makes a better job of the truth. — Doris Lessing

Added

• Command equiv for logical and delay equivalence checking of fcn_gate_layouts against a specification

• Command energy to print and log energy dissipation of current fcn_gate_layout based on a physical model for the QCA-ONE library

• Command area to print and log area usage in nm²

• Parameter -a and flag -A to enable asynchronous parallelism for exact

• Flag --minimize_wires/-w for exact to compute the minimum amount of wire segments needed

• Flag -s for show -n for less detailed visualization of logic_network objects

• Dockerfile and instructions for how to create an image using Docker (thanks to Mario Kneidinger!)

• CMake option to toggle animated progress bars on command line

Changed

• exact has been completely reworked to utilize true incremental SMT solving without push/pop mechanics (thanks to Alan Mishchenko for the inspiration!)

• exact --artificial_latches/-a has been renamed to exact --clock_latches/-l

• exact -m has been renamed to exact -c

• Standard resolves for clocking scheme names to their commonly used variants, e.g., 2DDWave becomes 2DDWave4

• Energy dissipation will no longer be logged using command ps -g; use new command energy instead

• Command cell can be found in command class Technology now

• Increased font size of clock numbers in SVG files by 2pt for better readability

• Changed constructor parameter types for core data structures (network and layouts)

• Changed std::size_t to fixed-size data types in lots of places

• Use library caching for Travis builds to speed up build time

• Moved to the latest releases of all libraries

Fixed

• Python detection in CMake under different versions

• Runtime logging in exact

• Performance issues in ortho

• SEGFAULTS caused by ortho on large networks when compiling with gcc

• ortho -b losing bent wire connections

• fcn_layout::random_face’s index to coordinate mapping again, but for real now (thanks to Till Schlechtweg!)

• logic_networks are deep-copied for each physical design call now to secure them from external changes

• Gates and wires without directions assigned are mapped to standard rotations using QCA-ONE library now

• Rotation issues with border gate-pin I/Os using QCA-ONE library

• 3-output fan-outs are correctly printed as fan-outs when using print -g now

• Testing ofstream’s for is_open in writers now (thanks to DeepCode!)

• Several compiler issues under MacOS and Windows (thanks to Umberto Garlando and Fabrizio Riente for pointing them out!)

• Z3 build script error under Unix with CMake version <= 3.12.0

• Z3 linking on MacOS (thanks to Daniel Staack!)

• bibTeX citation information correctly handles last names and arXiv prefixes now

Removed

• exact --limit_crossings/-c and exact --limit_wires/-w as they have been replaced by respective optimization flags

• Legends in print -g/-c

v0.3.0 - 2019-11-22

Sometimes, fiction was so powerful that it even had reverberations in the real world. — Delphine de Vigan

Added

• Support for iNML technology using ToPoliNano’s gate library and clocking scheme. Thanks to Umberto Garlando for cooperating with us on this project!

• Support for vertically shifted fcn_layouts to emulate column-based clocking schemes

• Enhanced logic_network by incorporating mockturtle for logic representation

• Truth table store (mnemonic -t) and command tt. Thanks to Mathias Soeken for granting permission to use code from CirKit!

• Command simulate to compute truth_tables for logic_network and fcn_gate_layout objects. Thanks to Mathias Soeken for granting permission to use code from CirKit!

• Command akers to perform Akers’ Majority synthesis to generate a logic_network from a truth_table

• Command random to generate random logic_network objects

• Command check to verify structural integrity of designed fcn_gate_layout objects

• Command gates to list gate counts for each vertex type in the current logic_network

• Command fanouts to substitute high-degree inputs into fan-out vertices in logic_networks using a given strategy

• Command balance to subdivide logic_network edges to equalize path lengths by inserting auxiliary wire vertices

• Command qcc to write iNML cell_layouts to component files readable by ToPoliNano and MagCAD

• Capability to enforce straight inverter gates in exact with flag -n

• Capability to minimize the number of used crossing tiles in exact with flag -m

• Capability to parse AIGER (*.aig) files using read

• Parameter -b for ortho

• Progress bars for exact and ortho

• show -n to display logic_network objects

• Several convenience functions in the core data structures for easier access

Changed

• Moved to C++17

• Moved to version 1.0 of cppitertools

• Included latest updates for alice

• Switched logic_network’s CLI mnemonic to -n as it is no longer reserved by alice

• Renamed pi/po_count to num_pis/pos

• read does no longer substitute fan-outs automatically, exact and ortho do it instead if the user did not call fanouts

• exact --path_discrepancy/-p has been renamed to exact --desynchronize/-d to express its use case better

• exact --timeout/-t expects its parameter in seconds instead of milliseconds now

• exact --fixed_size/-f expects its own parameter instead of using --upper_bound’s one

• Renamed version.h to version_info.h

• Renamed Placement & Routing to Physical Design where appropriate to match the documentation

Fixed

• Segfault when using ortho -i with certain compilers in release mode

• Missing input ports for 3-output fan-out gates in QCA-ONE library

• Wire vertices not handled properly by QCA-ONE library

• Wrong clocking look-up for BANCS clocking in fcn_cell_layout

• Tile directions when assigning and dissociating multiple edges

• fcn_layout::random_face’s index to coordinate mapping (thanks to Till Schlechtweg!)

• Format issues with benchmark files

• Constant outputs of some benchmark files

• Additionally, there are several performance improvements in core data structures and algorithms

Removed

• Submodule lorina as it is included in mockturtle

• verilog_parser.h as mockturtle comes with its own one

• print -n as it is replaced by show -n

• operation::BUF; use operation::W instead

• operation::CONST0, operation::CONST1, and operation::XOR

• operator[x][y][z] for fcn_layouts as it was slow and therefore not used; use face/tile/cell{x,y,z} instead

v0.2.1 - 2019-05-02

Fiction is art and art is the triumph over chaos. — John Cheever

Added

• Support for BANCS clocking and integration in exact

• Name strings for fcn_clocking_scheme objects and corresponding name-based look-up

• Version and build information accessible within the code by including util/version.h

• Parameter -i for command ortho

• shortcuts.fs with predefined flows

• benchmarks/MAJ/ folder with some TOY benchmarks using MAJ gates

Changed

• Calls to exact -s now need to name the desired clocking, e.g. exact -s use (case insensitive)

• incoming/outgoing_information_flow_tiles have been renamed to incoming/outgoing_data_flow and handle multi wires now

• Renamed diagonal clocking schemes to 2DDWAVE and gave proper credit

• More verbose error messages

Fixed

• TP calculation for layouts without designated I/O pins (thanks to Mario Kneidinger!)

• I/O port orientation of PI/PO gates using QCA-ONE library

• Usage of non-PI/PO MAJ gates in QCA-ONE library

• Visualization of clock latches in show -c (thanks to Sophia Kuhn!)

• Multi direction assignment to wires and gates in exact leading to physically impossible layouts

• shrink_to_fit in fcn_gate_layout incorporates the BGL bug now. Minimum size in each dimension is 2. For more information, see https://svn.boost.org/trac10/ticket/11735

• Parameters for exact no longer get stuck once set

Removed

• Parameter -n for exact

v0.2.0 - 2019-03-21

Fiction reveals the truth that reality obscures. — Jessamyn West

Added

• Export fcn_cell_layout objects as SVG using show -c. See README for more information

• ps -g displays and logs critical path and throughput of fcn_gate_layout objects

• Support for RES clocking and integration in exact

• New TOY benchmarks in respective folder

• New command clear to remove all elements from stores (as a shorthand for store --clear ...)

• Information about how to build fiction for WSL

• Functions to distinguish different logic_network types like AIGs/MIGs/…

• Parameter -n for command ortho

Changed

• Revised folder structure due to the increasing amount of source files

• read_verilog is now called read and can process directories

• gate_to_cell is now called cell

• write_qca is now called qca and handles file names automatically if necessary

• -u is not a required parameter for exact anymore

• Richer output for print -w

• Included latest bugfixes for alice

• Included latest update for lorina

Fixed

• Starting layout size for calls to exact -i was too low and has been corrected

• Several code and comment inconsistencies

Removed

• ITC99 benchmark files

v0.1.1 - 2018-12-29

Literature is a luxury; fiction is a necessity. — G. K. Chesterton

Added

• Technology-specific energy model for fcn_gate_layout; supports QCA thus far

• Support for print -c to write a textual representation of fcn_cell_layout objects

• Information on nested fiction scripts and documentation generation in README

• linguist flags in .gitattributes to prevent benchmark files from being viewed as source code

Changed

• Moved to version 0.4 of alice

• Moved to version 4.8.4 of Z3

• fcn_gate_library objects now have name strings

• print -g now displays incorrectly assigned directions by bidirectional arrows

• “Release” is the standard build mode now

Fixed

• Copy and move constructors of logic_network work properly now

• Calculation of bounding_box size on fcn_gate_layout now handles empty layouts correctly

• Several minor and rare bugs, code inconsistencies, and performance issues

Removed

• Nothing

v0.1.0 - 2018-10-29

Let there be a fiction.

This is the initial release. Please find a feature overview in the README.